As mentioned the memory is one of the two remaining parts of the computer to be built (the other one being the mostly mechanical punched tape reader).
For this I've tried to see if a ready design was available, but until now I didn't find anything suitable. Many relays computer implementations I've seen are attached to modern static RAM with some adaptor. The others are using diodes, as the TIM8 one, but I'm trying to avoid them in the construction since they were not available in the middle of 1800.
The solution I'm thinking to implement is using just relays and capacitors. Not sure if it is the simplest as I'm always trying to push for, and I'm posting it here also to see if someone can improve it or suggest a new design.
To write first erase content with EnableRead without Read signal, then switch off EnableRead and switch on EnableWrite and put on the bus what to write.
To read switch on the Read signal than EnableRead will load the Memory read register with the value that is being put on the bus. Release the Read signal when the value is not anymore needed on the bus.
1. The data is stored on capacitors, the relays form just the "memory controller" part
2. Reading content "refresh" also the capacitors memory
3. One of the addresses (zero in the example picture) is filled with switches instead of capacitors in order to save one control line and two relays that else should be dedicated to input read
Relays count for 8 bytes (64 bits) memory:
+ 14 relays for address decoding (2+4+8)
+ 2 for EnableRead
+ 2 for EnableWrite
+ 8 for the Memory read register (can be dpdt)
= 18 4pdt + 8 dpdt relays (plus 56 capacitors and 8 switches to complete the circuit!)