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16 bit 74xxx TTL computer

Created from 74xxx series logic and some RAM/ROM chips

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16-bit computer
16-bit ALU (74181)
3 16-bit execution registers
16-bit program counter
7-bit instruction register (128 instructions max, 79 working instructions)
32 control ROM signals for data flow of components on bus
1 16-bit input buffer
1 16-bit output register
32KB RAM
4KB ROM (currently developing assembly subroutine functions)
8-bit stack pointer (256 layers)
LCD compatible

When I was in grade 9 I watched Ben Eater create a computer from logic chips and my mind exploded. I realized computer architecture was just like LEGOs and that is how I spent my entire high school life doing. I wanted to create a computer better than Ben Eaters. His was an 8bit computer was 16 bytes of RAM and 16 instructions. I needed to do something far better. So I began to design my first computer in grade 10. Since then I created 5 other machines. This project is about my most recent creation. It is a 16 bit machine with many useful instructions. It is similar to Ben Eaters computer except that:

- Instructions can have up to 16 micro states

- If an instruction does not need 16 micro states to execute the micro state counter is reset

- Stack Pointer

- LCD display

- 74181 ALU

- 32KB RAM 4KB ROM

- Up to 128 instructions

- Conditional branching


Understanding the Architecture in Words

Print the instruction set and the block diagram of the architecture, then read this and use that for reference.

This architecture is linear. Once an instruction is finished address in the program counter is used as the location of the next instruction to execute. There is no parallel computing or memory management but that is an area I would like to explore in the future. 

A program is just a list of instructions that the computer follows exactly in the order you list them in. It has memory where you place the instruction and variables in. This computer has a RAM memory of  about 32000 bytes and ROM memory of 4096 bytes.  Something different about this computer is that instruction codes are made of sometimes 1 or 3 bytes but for the most part, most instructions need 2 bytes. The first byte is always an instruction. The address larger than the first byte stores the operand and the number of operands is dependant on the micro code of the computer which is explained later. 

 The computer distinguishes between RAM and ROM memory through logic gates explained in the memory section. When a computer is fully reset it will think that the first instruction is stored at memory address 0. If we have a program already stored starting from address 0, it will begin to execute.
To understand how a computer like this executes we must look at something called the instruction cycle. The instruction cycle consists of 3 main steps. There is a ring counter counting at a frequency that sets the speed of the CPU.  It resets when it counts to 16 or gets a signal saying that an instruction is done executing and does not need the full 16 states to complete. It just keeps track of which of which instruction state is active. State 1 on the counter represents fetch, state 2 represents decode, and 3 -16 all represent execution states. Execution states vary depending on state 1 and 2. To understand why continue reading my friend. 

Fetch: the ring counter is reset and pointing at state 1 in the control ROM

Find RAM at address of interest(stored in program counter) where we expect an instruction to be stored for sure. This is basically outputting the contents of the Program Counter onto the bus for the Memory Address Register to read. This explains why the computer begins to read instructions from address 0, because on reset, the program counter becomes 0. 

Decode: 

Since the Memory Address Register is pointing directly into RAM while in RUN mode, the contests of RAM at that address(which is basically the first instruction of the program are put on the bus and the Instruction Register is loaded with a this instruction. At this point if you look at the block diagram of the architecture. The output register is connected to a bunch of decoding things. To understand this read the control unit section. Basically fetch and decode are always expected to happen and not placed on the instruction set table. Only  The Program Counter is incremented. Why tho?? This can be explained since the program counter...

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ips-B063F66D-DD52-418F-86A4-F3A0D224BD5B.mp4

This is the same program as the one running in the video before this. The change is the clock speed.

MPEG-4 Video - 526.22 kB - 10/19/2019 at 19:43

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ips-44F4ECF9-7BFE-4A4A-A0EC-917932514E60.mp4

Got the ROM to work. This is the first program stored in ROM as a subroutine. It is running pretty fast

MPEG-4 Video - 310.93 kB - 10/19/2019 at 19:43

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IMG_0163 (2).JPG

Used headers to connect the control panel to the bus of the computer.

JPEG Image - 1.54 MB - 10/19/2019 at 19:43

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IMG_0140 (1).JPG

Making the control panel a little more "panel-ly"

JPEG Image - 1009.12 kB - 10/19/2019 at 19:43

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IMG_0034.mp4

Hello World program first run AND WORKING!

MPEG-4 Video - 1.81 MB - 10/19/2019 at 19:28

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  • Update Oct 25 2019

    ammarbhayat2810/25/2019 at 05:37 0 comments

    I am currently wrote the game code for snake.

    I plan on writing floating point arithmetic subroutines as well as using the taylor series to produce trig/log/hyp/exp functions

    I am also going to code conways game of life.

    Planning to make a GPU for this computer that will drive a VGA output

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