I ran out of slots. 12 is not enough, and I didn't feel comfortable trying to do 24 or 36 slots with active termination because.. lets face it.. termination is deep magic.
Instead the board is a combination of buffers driving the unidirectional signals onto the secondary bus, some very generic decode logic to match a specific 8bit port, and a very standard bidirectional 8bit I/O port that happens to be wired to the data bus of the secondary.
When the low 8bits of the I/O port in question match, the request ends up on the secondary bus with the upper 8bits of the port remapped to the lower bits on the secondary bus. The data bus is buffered in the right direction according to the R/W lines. The first version has a slight glitch in that I forgot to add jumpers so you can avoid driving RX/TX across the boards when they are in use on the primary (as would be normal). Hence the pin sticking out in the picture.
0.2 should fix that but will not get tested until the next PCB orders.