A simple JTAG test board for 84pin PLCC MAX7000S CPLD

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I am a big fan of the EPM7128SLC84 CPLD device. It supports 5V I/O for retroputing projects,
has enough macrocells to support medium complexity projects (e.g. glue for hd6309 SBC), etc.
This device is EOL from Altera (Intel) but can be found on the 'gray-market' (e.g. eBay).
However, many of the devices found from such sellers are not usable because the JTAG pins
have been re-assigned to I/O. Once this is done, the CPLD can only be reset to factory
default state with hard-to-find Altera parallel programming equipment.

So, this project was born to allow CPLD devices to be temporarily connected to an Altera USB
blaster (or compatible) to see if the JTAG is operational. A 3M PLCC socket is used for this
project, which might be a bit hard to find, but is well worth the effort.

This is about as simple as it gets! A rudimentary 5V supply is included onboard for ease of use. A "current" header is included, to allow the CPLD IDD to be measured - this is another good way to determine if your unknown CPLD is good/bad. The obligatory LED is included (yes, that current is drawn through the shunt connector as well!). A 10 pin JTAG header allows connection to the USB blaster, and the 84pin PLCC test socket is where the D.U.T. goes. 

Adobe Portable Document Format - 83.60 kB - 02/06/2020 at 18:45


  • Built and Working

    tomcircuit02/06/2020 at 19:02 0 comments

    I built up the board (well, all but the regulator, which I'm still waiting on...) and fired it up by injecting the 5V through the "current" header. I was able to sort through about a dozen or so EPM7128SLC84 and even a few EPM7160SLC84 devices.  All from eBay, and 5/12 had locked-out JTAG :-(  But, better to learn this now, instead of after being soldered onto my project PCB!

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