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BUS System & Mainboard

A project log for WDR-1-Bit-Computer

Recreation of the MC14500-based WDR-1-Bit-Computer

pascalPascal 04/11/2020 at 18:080 Comments

After taking a closer look at the "BUS System" that the original 1-Bit-Computers used, I decided to make my own one which allowed for more flexbility. For that, I plan to use the card edge connector 6364666-1 by TE.

The mainboard is finally also done. Instead of no BUS slot but an expansion header, I added 4 unused expansion cards and the classic expansion header for downward compability. Also added a proper connector to add a external keyboard. The schematics are uploaded as .PDF together with a parts list.

(Also, still figuring out how this online HaDIO Web Editor works)



This is the BUS definition:


Pin Row 1
NameDescriptionPin Row 2
NameDescription
1+5VVoltage Rail
62+5VVoltage Rail
2GNDVoltage Rail
61GNDVoltage Rail
3INST0Instructions (IO Address)
60PCNT0Program Address / Counter
4INST1Instructions (IO Address)59PCNT1Program Address / Counter
5INST2Instructions (IO Address)58PCNT2Program Address / Counter
6-Omitted Pin & Hole
57PCNT3Program Address / Counter
7INST3Instructions (IO Address)56PCNT4Program Address / Counter
8INST4Instructions (Actual Instruction)55PCNT5Program Address / Counter
9INST5Instructions (Actual Instruction)54PCNT6Program Address / Counter
10INST6Instructions (Actual Instruction)53PCNT7Program Address / Counter
11INST7Instructions (Actual Instruction)52PCNT8Program Address / Counter
12CLK IN
MC14500 Clock IN
(Used to define the clock)
51PCNT9Program Address / Counter
13CLK OUT
MC14500 Clock Out
(Used for Peripherals)
50PCNT10Program Address / Counter
14JMPJump Signal (Not used)
49PCNT11Program Address / Counter
15RTNReturn Signal (Not used)
48PCNT12Program Address / Counter
16FLAG 0
Flag 0 Signal (Not used)
47PCNT13Program Address / Counter
17FLAG F
Flag F Signal (Causes the
Program Counter to (Preset/) Reset
46PCNT14Program Address / Counter
18WR/!RDWrite / Read IO
45PCNT15Program Address / Counter
19DATAData BUS
44OUT0
Output
20RRResult Register Output
43OUT1Output
21MEMWRITEWrite-Enable Signal for
the Program Memory
42OUT2
Output
22RESET CPU
Resets the CPU and
IO Peripherals
41OUT3Output
23IN0Input (connected to
the Result Register)
40OUT4Output
24IN1Input39OUT5Output
25IN2Input38OUT6Output
26IN3Input37OUT7Output
27IN4Input36N.U.Not used, but routed on the Main Board
28IN5Input (connected to Out 5 on
CPU Board by a Jumper)
35N.U.Not used, but routed on the Main Board
29IN6Input (connected to Out 6 on
CPU Board by a Jumper)
34N.U.Not used, but routed on the Main Board
30IN7Input (connected to Out 7 on
CPU Board by a Jumper)
33N.U.Not used, but routed on the Main Board
31N.U.Not used,
but routed on the Main Board
32N.U.Not used, but routed on the Main Board

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