A project log for Evaluating Transistors for Bipolar Logic (RTL)
Experiments on optimizing discrete logic gates based on bipolar transistors
To speed up the propagation time of the inverters in the ring-oscillator further, I built up samples with smaller base and collector resistors.
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I should make a similar measurement with the BFS480 :-D
Are you sure? yes | no
Yes, that should be interesting. My guess is that it is slower than the PMBT2369, because it is not optimized for saturation switching. See also my results for the HF-transistor.
Yes I remember these but I also remember seeing in the datasheets that these types of transistors are optimised for switching at a given current point. That's why your last curves "ring a bell" :-)
10mA is quite a lot...
But overall power could be reduced by using lower power supply voltages. Maybe even use a standard 3.3V PSU ? Rc=470 would then be the sweet spot :-)
Yes, indeed. I guess the high supply voltage in the CDC6600 was also chosen to be less susceptible to droop. If you have a more stable power supply it should be possible to reduce supply.
Actually it's crazy, basically all of the headroom beyond the logical high level (1.2V) is burned as waste energy in the resistors. Thats (6V-1.2V)*10mA/2= 24mW per gate! Only 6mW are actually needed for the switching.
Fortunately today we have PoL regulators :-)
Yes, delete it
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