The SBC-85 1Mbit bubble memory board requires buffering, address decoding, a very accurate 4MHz clock, and some power fail circuitry. These components are located along the bottom portion of the PCB.
With the decoding and support provided, the remaining design of the SBC-85 1Mbit bubble memory board is based on the BPK-72 bubble memory developer's kit.
Center stage on the board is the 1Mbit bubble memory device itself which is the Intel 7110 and where the actual magnetic bubbles are found. On the SBC-85 Bubble board this is the largest component in the center top. There are both pin and leadless versions of this chip, the next version of this board will be able to utilize either format but the current build is based on the leadless package. The chip carrier is seen on the project photograph.
Equally critical to operation of the bubble system are six other support chips as follows:
The Intel 7220 Bubble Memory Controller is the face of the bubble system seen by the outside world. This chip coordinates all actions in side the 7110 bubble memory as well as being the communications device to the system. When writing to memory, the data is written to the 7220 which then stores it in the bubble chip and when reading data the request is made to the 7220. All internal workings of the bubble system are hidden from the user and the interface comes down to communicating with this single chip. The 7220 is the 40 pin DIP located towards the bottom above the glue chips.
The magnetic bubble domains are 'moved' within the 7110 using a magnetic field created by windings wrapped around the 7110 to create a rotating magnetic fields in X and Y plane. These windings are controlled by the Intel 7250 Coil Predriver which generates the signal into a pair of Intel 7254s, each containing something like a H-bridge. The two drive transistor packages drive the X coil and Y coils. These three chips are along the top edge of the board with the 7250 coil predriver in the center and the X and Y drive transistor drivers on the top right and top left.
On the left side of the board mounted vertically is the Intel 7242 Formatter / Sense-Amplifier. While in the second half of the name, this chip's primary function is to sense the tiny signals from the bubble and amplify them before sending to the 7220 controller. The 'formatter' portion of the name comes into play because this chip also provides the 'mapping' of the device akin to bad sector mapping on a hard drive. Built into the 7110 bubble device are many extra racetracks and during production these are tested and the bad racetracks are mapped out (hence the boot map on the label on the top of the 7110). The 'formatter' function of the 7242 keeps track of the device map for the 7220 controller. Finally, error detection and correction are done in the 7242 so the chip could have been named the sense-amplifier / formatter / ECC.
As one would expect, it is somewhat complicated to move all the magnetic bubbles along their racetracks, split the seed bubble, replicate, and swap the bubbles so there is a dedicated chip to perform these functions. On the right side of the board mounted vertically is the Intel 7230 current pulse generator which directly interfaces with the 7220 controller and the 7242 formatter / sense amplifier. All of the digital signals into the 7230 from the 7220 result in their analog counterpart that directly drive the 7110 bubble device replicator, swap, etc. This chip also generates the PowerFail* signal that is used by the remainder of the bubble system.
The SBC-85 1MBit bubble board is a 2-layer 100mm x 125mm board with edge connectors for the SBC-85 backplane. There are no other I/O on the board other than through this backplane connector. All communication with the board is via a two I/O ports defined by the onboard SIP switch.