Already working instructions:
add, addi, addiu, and, andi, or, ori, sub, slt, slti, beq, bne, bgtz, j, syscall (exit)
Instructions yet to be added:
addu, subu, sb, lb, jal, jr, bltz, blez, bgezal, mfhi, mflo, sllv, srlv, lui, sll, srl, xor, xori, syscall (print int, print str, read str, print char, read char)
I will be updating my list of working instructions when I get 2 or more working and can guarantee they work. I will also be porting this to logism-evolution when I completely finish the MIPS CPU. Thus being able to use a color display to test its capabilities. I will also be taking advantage of Logism-evolutions ability to convert its circuit into VHDL or Verilog. But I first have to learn one of the two. I plan on learning Verilog due to its more "C" like nature and less verbose nature. Less verbose = smaller code.