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Counter Module

A project log for 74xx Discrete Clock

A retro-style digital clock based on 74xx discrete logic chips

stephanStephan 05/18/2020 at 18:180 Comments

The counter modules are the actual heart of the clock. There are six counter modules in total - one for each digit. All these counter modules are identical (I will come back to this "issue"...). They are based on 74HC161 binary counter. The counting range is defined via a 4-bit DIP switch, so each module can be configured to drive any of the displays. After reset or after an overflow, the counter starts counting at zero an counts until it reaches the "programmed" value again. I am using a 4-bit comparator based on 4 XOR2 gates (74HC86) and a final NOR4 gate (74HC4002).

The output of this comparator is HIGH when the current counter state is equal to the value programmed via the DIP switches. The comparator output is connected to one input of a cheap AND2 gate (based on two diodes and a resistor). The other input of the cheap AND2 is driven by the module's carry input (CI).

When the comparator detects a match AND the module's carry input is HIGH, the cheap AND2 outputs a HIGH level. This output is inverted by the second NOR4 gate and brought to the low-active parallel load input of the counter chip. Since this is a synchronous control signal, the counter is reset in the next clock cycle (all parallel input signals of the counter are tied to low). The signal driving the parallel load also represents the module's carry output, which is low-active (!CO). The status of the carry output is indicated by a red LED.

The enable input of the counter chip is driven by a cheap OR2 (two diodes and a resistor). The first input is driven by the module's carry input (CI). The second input is driven by an on-board button, so the counter can be manually set (to define the initial time). There is no need for any kind of key debouncing, since the counter enable is only evaluated at a rising clock edge (which runs at 1Hz).

Clock and reset signals of the counter chip are driven by the global reset (!RST) and clock (CLK) signals.

Used logic chips:
* 74HX161: 4-bit counter with synchronous parallel load
* 74HC4002: Dual NOR4 gate
* 74HC86: Quad XOR2 gate

Schematic:

Pictures:

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