Lookup Table ALU

Optimized tables to occupy a 20addressbit x 16databit device

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MR4A16B MRAM and CY14B116M NVSRAM are big enough to store 32 tables of 8bit Vs 8bit. Outputs are also multiplexed to permit carry select between two 8bit cases. Problem is how to store flags efficiently. And what arbitrary complex functions might be the most useful?

Two tables can be set aside for 16bit increment, though its likely I woud use a separate devices for 16bit counting. Avoid the complication of multiplexing different width results.

Two tables (sans carry, with carry) set aside for functions that might reference only one input byte. The other input byte can then select between 256+256 smaller tables.

Perhaps two tables set aside for packed flag results? We collide any 8 bits vs another 8 bits and out pop 2 cases of flags that might simultaneously represent carry, borrow, reverse subtract's borrow, zero and flags thrown by single byte tables vs 256 small functions as described above.

Not sure its a problem that flags aren't simulateous with results? Sometimes we just want to know wether to break out of a loop or branch, and knowing the numerical result is not important. Other times might need only a result. Unwanted flag updates may be irrelevant, even a nuisance.

Adding and subtracting wide numbers, and of course wide rotations seem to be the cases where a simultaneous carry output helps.

Is it worthwhile to parallel a smaller device to store flags?

Is it better to occupy half the width of the device with a scarce few flags? Carry could feed an address bit instead of selecting between two simultaneously presented cases. Might be the easy solution, but for the wasted potential...

More on this later, I got years of notes I need to clean up and try to make presentable. 

And I need a better DIP converter, compatible with normal breadboards. Not all pins of the TSOP-II 54 device need breakout. 40pin DIP might be plenty for an optimized breakout. The Cypress NVSRAM also requires a capacitor to backup volatile SRAM to quantum traps on shutdown. Everspin MRAM needs no backup capacitor. Otherwise the pinouts seem similar...

I don't actually have the pictured adaptor in hand at the moment,  buried somewhere in storage. And this old photo has a filename that suggests a much smaller table space than the 16megabit I thought I had mounted. Hopefully I just mislabeled the photo or misread a faded number. In the photo, I count only 44 pins broken out, not 54. So probably stuck with 4Megabits and only 18 address lines. Suppose it can still find use as program counter or flags.

I didn't want to dumb this down to 7 bits, but might have to consider it now. Solves the flag problem and uses two less address bits which have suddenly discovered themselves in short supply.

  • Recent thoughts

    Ken KD5ZXG01/01/2021 at 05:28 0 comments

    32 Gigabit are available now, which would allow simultaneous parallel flags and greatly simplify how flags work at pain of higher price and wasteful utilization of the extra table space. Savings of my time and sanity may be worth the sacrifice certain ideals.

    Also given some thought how busses fit together to make a CPU. I wish a pair of 32Kx8 SRAMs to ambidextrously feed registered arguments to this ALU's address bus. A latch at the exit will grab the result while tables are busy feeding valid address to other tables.

    Latch can write the lookup back to either register bank, neither if only checking a flag, or mirror to both for later ambidextrous read.

    8 way MUX will select a current flag output or preserved older state. Allowing choice of Zero, Carry, HalfCarry, Overflow, Sign, Odd, Old, and perhaps one other flag not yet decided. 

    Selected flag and branching option (true, false, always, never) may then skip over the next instruction (for example a long jump) without wasting time to fetch and dismiss it. Decision is not triggered by the instruction being skipped.

    Getting tired. I need to sleep on this plan and revise tomorrow. 

  • Packed Flags

    Ken KD5ZXG07/05/2020 at 11:57 0 comments

    Simultaneous conventional flag output from one device can be had at the loss of Carry Select and eight alternate tables. I have a plan B, called "packed flags", to store much more efficiently. But doesn't allow simultaneous output and still wants at least two tables to hold them.

    Collision of byte A vs byte B nets 16 all purpose flags, with no operation specified but "flag lookup". We may choose not to waste time examining bytewise results that supposedly threw these flags. Just knowing the flag might be enough. But which 16 flags? Thats the important question. Some possibilities:

    Carry((A+B)+0) aka A+B>0xFF
    Carry((A+B)+1) aka A+B>0xFE
    Borrow((A-B)-0) aka A<B
    Borrow((A-B)-1) aka A<=B
    Borrow((B-A)-0) aka A>B
    Borrow((B-A)-1) aka A=>B
    FunFlag(A,B,0) whatever bit might rotate or swap out of a single byte function sans carry
    FunFlag(A,B,1) whatever bit might rotate or swap out of a single byte function with carry
    A=B aka Compare's Zero (Might get the axe in favor of an external NOR gate that checks Zero of any operation)

    Well, that's ten or eleven of sixteen. Got plenty more ideas, but they are all sort of goofy. Do I really need a flag bit that tells if AB is prime? Yeah, that sort of goofy... More old notes to consult. Practical ideas must have passed my mind at some point.

    All functions that make the cut must prove worthy. Like some rotations seem redundant to multiply and divide, you wouldn't expect duplicate entries to be wasted on them. Unless they need to throw a flag, which multiply can't do.

    Ten plus Overflow flags for six flavors of math could make sixteen. But who actually uses overflow, seriously? Don't want a half carry since BCD to BIN and BIN to BCD tables don't need one. Don't need a negative flag, since any bit of any lookup can direct branching, just branch on the sign. 

    Interrupt status can't be looked up in a table, would make no sense to pack those as pre-calculated flags. Maybe they should work in the same manner as the external gate that tests for Zero. Has Zero now become an interrupt?

    I've got enough flags to fill a table and call it quits, I just want six BETTER choices than useless overflows...

  • Reasoning

    Ken KD5ZXG07/04/2020 at 17:28 0 comments

    I have an old 3V Rasberry to generate and bit bang those tables. It doesn't quite offer enough IO to bang the whole device at once without multiplexing. No reason they have to all be banged at once. Manual multiplexing may work just fine.

    Reason for carry selecting an output buffer after lookup rather than feeding an address bit was because a lookup takes 35nS and can't start till we know the address. Output buffers can probably be enabled/disabled much faster (I still need to test that theory). Carry could still be figuring itself out while dual lookups get a speculative head start in parallel. Maybe your instruction wanted gates on the side to clear or invert that carry? Now you got time...

    Tables offer more function than would horribly clutter an instruction set. Some are best looked up programmatically. Could also serve a coprocessor role, perhaps for a relay computer that lacks a hardwired rotate right. Generating those tables might be a challenge within reason for any primitive machine, thus using them afterward won't be a total cheat.

  • Rotations etc

    Ken KD5ZXG07/04/2020 at 17:23 1 comment

    ***Breakdown of Single Input Functions***
    Some may use Carry Select as an extra input.
    Many spread across multiple tables for extra inputs, designated M & N.

    At this point, we have burned exactly 128+128 of our 256+256 functions.

    What the heck did I hit my head on when I hallucinated an arithmetic shift with carry?

    Probably meant that carry would backfill to the left. Just as MSB would backfill ASR.

    Temporarily counting other useful tables, not yet organized to assign codes.

    1 Reverse 01234567 to 76543210
    1 Convert BIN to CDH (Coded decimal high, hundreds only)
    1 Convert BIN to CDL (Coded decimal low , tens and ones)
    1 Convert CDL to BIN
    1 Convert BIN to GRY
    1 Convert GRY to BIN
    1 Convert SGN to TWC
    1 Convert TWC to SGN
    1 Count Leading Zeros
    1 Count Leading Ones
    1 Count Trailing Zeros
    1 Count Trailing Ones
    2 Count All Zeros including Carry
    2 Count All Ones including Carry
    10 ASCII Terminal Font (as 10 lines of 8 dots)
    2  ASCII Fourteen Segment Font (plus two : dots)
    2  ASCII Sixteen Segment Font (if you want dots, reference the 14Segment Font)
    2  88 piano keys to 16bit half wavelength at 3.579545MHz Color Burst
        87 tones halfway between piano keys (Quartertones)
        59 Bohlen Pierce (13 tones per Tritave)
        22 Shrutis (of exact fractions to the tonic)
    4  Wolfram's Rule #30 with bookend bits MxxxxxxxxN
    4  Wolfram's Rule #90 with bookend bits MxxxxxxxxN

    216 single input functions for now, leaving 55KB as yet undefined

  • Old notes

    Ken KD5ZXG07/04/2020 at 05:52 0 comments

    I've scraped together a few of my old notes.
    Imported TXT doesn't seem to column well.
    I've done a poor job of fixing those columns. 

    Start by assuming a 16Megabit device
    perhaps with a small helper for flags
    allocating address space to 32 tables:

    ***The Grand Table of Tables***
    Note fixed point byte positons HL . XYZ

    _L.___ ADD(A+(B+0))  _L.___ ADD(A+(B+1))   Flag outputs to be stored separately
    _L.___ SUB(A-(B+0))   _L.___ SUB(A-(B+1))
    _L.___ RSB(B-(A+0))   _L.___ RSB(B-(A+1))      Reverse subtract
    _L.___ FUN(A,B,0)      _L.___ FUN(A,B,1)        256+256 single input functions
    ---Below this line need not store or throw flags, detect zero with a logic gate---
    _L.___ A                     _L.___ B                       MUX(A,B) 
    _L.___ OR (A,B)          _L.___ XOR(A,B)
    _L.___ AND(A,B)        _L.___ NOR(A,B)
    H_.___ INC(AB+1)       _L.___ INC(AB+1)        16bit count, bypassing 8bit carry
    H_.___ DEC(AB-1)      _L.___ DEC(AB-1)
    H_.___ MUL(A*B)       _L.___ MUL(A*B)
    _L.___ DIV(A/B)         __.X__ DIV(A/B)
    __._Y_ DIV(A/B)         __.__Z DIV(A/B)
    _L.___ MOD(A/B)       __.X__ COS(AB)
    __._Y_ COS(AB)        __.__Z COS(AB)           Let AB represent the 1st quadrant
    _L.___ SQR(AB)         __.X__ SQR(AB)
    __._Y_ SQR(AB)        __.__Z SQR(AB)

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ferisyter wrote 04/11/2021 at 00:05 point

can you share the source code of your program? I want to test it for my new program of Frankincense Resin store, you can see here

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Ken KD5ZXG wrote 07/04/2020 at 21:01 point

I need monospace. How do I do that without inserting a picture?

Nevermind, I gave up and inserted a picture of text to insure columns stayed aligned.

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