A project log for Retro 68000 CPU in an FPGA
Making a Retrocomputer with a 68000 CPU in an FPGA
Got TUTOR 1.3 running on the 5CEFA2F23 Cyclone V FPGA card. on the RETRO-EP4CE15 base card. Needed to fix the address decoder to use 16KB of space for the ROM.
Code is up in GitHub.
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