In the previous log, I talked about the system problems with the ISSI driver chips that use an I2C interface with limited (4 devices per bus segment) address choices. Also mentioned are the daisy chain aspects of the SPI interface using the expensive MAX7221 parts. Possible solutions for the limited address choices in the I2C chips are:

   A) Use multiple I2C buses.

   B) Use address translators to break up the I2C bus in to multiple segments.

   C) Use I2C bus multiplexers to break up the I2C bus in to multiple segments.

Option A works if you only need a few characters displayed, or the MCU that you are using has multiple I2C buses. The SAMD21 parts in the 100 pin packages give you access to up to 6 I2C buses which would drive up to 24 characters of the single driver version of the IS31FL3730 chips. Managing 6 I2C buses and splitting up the outgoing character data would be a hassle in the software part of the project, but could be done.

Option B, using address translators to break up the I2C bus in to multiple segments. Linear Technology/Analog devices makes some address translator parts that allow you to XOR bits in the address field of an I2C packet on an isolated sub-bus. The parts that I have used are the LTC4316 (single and LTC4317 (dual) multiplexers. This arrangement works pretty well, I used the LTC4316 parts on the IS32FL3738 based driver boards. The advantage with the translater chips is that you get maximum flexibility on the addressing by using them. If you select your addresses carefully, the fact that the bus is segmented downstream is invisible to the bus host.

There are a couple of problems with them though: cost, build complexity and limiting your configuration options.  The LTC4316 parts cost $3.61 US each, and will allow you to add 4 additional IS31FL3730 based boards. The original IS32FL3738 boards that I built had two of the driver chips and one of the LTC4316 chips per board. This is an expensive board when you need several of them. Later, I built a dedicated bus splitter/translater board that used two of the LTC4317 chips per board to get up to 4 separate bus segments with their own address translation. The LTC4317 chips cost $4.34 US each, and can support up to 8 of the IS31FL3730 based boards per translater chip.

Both the 4316 and 4317 parts use external resistor dividers to set the bit combinations to XOR with the address fields. There is one divider to set the lower 4 bits of the address and another divider to set the upper 3 bits of the divider. The resistors used in the dividers need to be 1% resistors to have a deterministic mapping with manufacturing tolerances. Each extra sub-bus adds 4 additional resistors to the board design, configuration and assembly time. For manual assembly, keeping all of the resistor values straight and getting them in the correct location adds to the build time of an otherwise low component count board. I wound up writing a C program to generate a table of the resulting address maps with the resistor combinations.

The data sheets offer specific values for the resistors to select the XOR bits. The values shown are fairly high resistance. I thought about designing the splitter / translater boards to use jumpers to select the resistor values, but was concerned about spreading these high resistance dividers around on a board with jumpers to get configurability. For the first generation of driver boards that each had their own LTC4316 on them, the PCB real estate required to add a  jumper system in a noisy digital environment was prohibitive. The resistor configuration system is not a binary system, so controlling 4 bits of address configuration would require up to 16 jumpers.

Option C, using I2C bus multiplexers to break up the I2Cbus. Initial searches for I2C bus multiplexer chips showed only expensive parts, and using bus multiplexers requires some software support. I dug around some more, and found some low cost 8 channel I2C bus multiplexer chips, the PCA9547 from NXP. The PCA9547 parts cost $1.78 US. One of the PCA9547 chips will support up to 32 characters using the IS31FL3730 driver chips. The required software support to use the multiplexer is minimal. I wrote a function that will issue a command to change the multiplexer setting if the sub-bus number changes in the communication process. An additional array was added at the lowest level of the software that contains the sub-bus number for each character. There is already an array containing the I2C address of each module, so the extra array and function call is a minimal effort. 

At this point, Option C is going to result in the lowest parts cost and simplest cabling for projects with more than a few characters.

The splitter / multiplexer board that I designed also got an I2C ambient light sensor stuck on the back side of the board. In use, the new splitter / multiplexer board will sit next to the row of LED character modules, with the ambient light sensor facing outward. The ambient light sensor was used in my GPS clock project to automatically set the LED brightness based on room light levels, and I am very happy with that feature.

One of the positive aspects of my exploring the other SPI interfaced driver chips is the idea that I had of daisy chaining the display driver boards with pass through connectors. The clock project that I built did not have the pass through connector setup and the cable that bused 9 characters of an I2C bus was pretty painful to make. Redesigning the IS31FL3730 boards to use the pass through connector arrangement will simplify the cabling a lot. Limiting the I2C sub-buses to 4 characters each will also limit the power supply current through the pass through connectors.