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Configurable video output for 6502 computers

A flexible, configurable video circuit for homebrew computers, with shared RAM access and easily-tunable timings

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This is the second iteration video output circuit for my homebrew 6502-based computer. The main advancement here over my first iteration is using down-counters for all the timings, making it easily tunable and potentially software-configurable. This has allowed me to easily experiment with different timings - NTSC vs PAL, interlaced vs progressive, and different visible image sizes and placements. Right now I run it at 384x256 and 640x256, and with minor modifications it should support 640x512, 720p, 1080i, and VGA resolutions.

Where's all the information?

I haven't fully-populated this project page yet, but please see the github repo for more details:

https://github.com/gfoot/compvideo6502

There are also some videos on my YouTube channel that show this working, for example the one linked below at the end of this description.

And please do let me know if you're interested, as I can prioritize giving more information here and a deeper dive into how it all works!

What was V1?

In case you're curious, V1 was my first effort at video output, and it worked pretty well.  It was built much like Ben Eater's scheme, but using 12-bit counters (4040BE) so I only needed two of them; then, as in Ben's video, logic gates to detect specific count values and do things like send sync pulses, start outputting a line of video, etc.  It worked pretty well, but was inflexible - changing the timings required completely reworking all the logic gates, and that's what I sought to fix for this version, V2.

How is this V2 version different?

In this version, instead of having one central counter, each individual timed element has its own down-counter.  Instead of using logic gates to determine the end of the count, we program the downcounters with specific values to count down from.  Then when they hit zero, the event should happen; and they're all reset either at the start of a field, or the start of a line, or by some other downcounter, on a case-by-case basis.

The end result is that you can reconfigure the timings easily by moving certain links on the breadboard, connecting different pins high and low.  It'd also be rather simple to connect up some 8-bit registers, e.g. 74HCT273s, and let the CPU itself define the timings dynamically.  This is pretty close to how something like a 6845 CRTC used to work many years ago.

Future plans

I'm also considering a V3 with a planar memory architecture like old-school EGA, and hardware assists for writing to video memory, to take some load off the 6502 and allow it to work more effectively with higher colour depths and resolutions.  Right now the 6502 itself is really the bottleneck, both in terms of address space for video memory, and the rate at which it can write to it.

Example video

Here's the video I mentioned above showing this video output circuit in action - towards the second half of this short video:

IMG_20201004_232301~2.jpg

Extra circuit patched on to support 640x256 output resolution. On the left is a Pierce oscillator with a 27MHz crystal; in the middle is a flip flop used to control the address counter timing; and on the right is a 4-bit adder that adds the $3000 base offset to the video address

JPEG Image - 2.66 MB - 10/04/2020 at 22:35

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IMG_20201004_231706~2.jpg

640x256 test image, on a little 7" monitor

JPEG Image - 3.74 MB - 10/04/2020 at 22:35

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compvideo6502_schematic.pdf

PDF containing full schematics - please see github for KiCad sources

Adobe Portable Document Format - 628.78 kB - 09/17/2020 at 19:14

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  • Demonstration video - Bouncing Balls

    George Foot10/12/2020 at 14:58 0 comments

    Just a quick note - I've uploaded a demonstration video showing my current software sprite rendering system, bouncing balls around the screen.  This is mostly trying out some systems that I'll need to rely on in a more "proper" game.

    Check it out here and let me know what you think!

  • Next Steps

    George Foot10/10/2020 at 18:17 0 comments

    I've been thinking about next steps for this project.  It's been quite successful for its intended purpose, allowing me to experiment with different timings and resolutions.  The 640x256 upgrade last week has been working well since then, and I've started making a little game on it.

    There are a few definite directions I still want to take the video circuitry in though.  The main ones I've always had in mind are adding colour, proper 640x512 support, alternate output types (VGA, component), and higher resolutions (e.g. 1024x720, 1920x1080) as I'm interested in what's possible and what's beyond reach on a breadboard.

    In the past week a new interesting extension has come onto my list as well - decoupling the CPU, clock, etc from the video circuit more, so that the CPU can do its own thing when it's not accessing video memory.  This could become a module that's simple to plug into any 6502-based system and get a fully-fledged graphical display, much like how PC video cards used to work, or like what Debug Innovations' TTL VGA Terminal already does a great job of doing for text-based output.

    The trouble is, the better what I already have continues to behave, the less inclined I am to risk breaking it by extending it.  Some of these things are significant compromises - increasing the resolution would require a lot more RAM; adding colour would also require more RAM or would require lowering the resolution; and any increase in bandwidth will make the CPU struggle to fill the memory fast enough.  I'm still interested in climbing the mountain "because it's there", but I also have other projects on the go that require the existing system to keep working as it is.

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  • Upgrading to 640x256

    George Foot10/04/2020 at 21:48 0 comments

    I've generally been running this circuit at 384x256 resolution, and that's how it's configured in the schematics.  The main clock is 16MHz, but this is halved to 8MHz to from the pixel clock.  It's divided down a couple more times to 1MHz to form the CPU clock, and the interleaved memory accesses also occur at that frequency.  This is based on how the BBC Micro's video circuitry worked, and these timings match its "Mode 4", which was 320x256 (same timings, but a shorter line length for a non-widescreen display).

    The BBC Micro also had a higher resolution 640x256 mode, "Mode 0".  The way this worked was by doubling the pixel clock to 16MHz, and fetching from RAM at 2MHz.  This also requires the CPU to run at 2MHz or more, as a 1MHz CPU needs access to RAM for too long at a time.

    Unfortunately my 6502 CPU was a cheap clone and wasn't capable of running higher than 1MHz, so I wasn't able to get this doubling of horizontal resolution.  However, since building the circuit I have got some WDC 65C02s that can run at much higher clock speeds, and this weekend I decided to go ahead and do the upgrade.

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Dan Maloney wrote 09/17/2020 at 18:34 point

SD cards on a 6502 breadboard comp? Talk about technological cognitive dissonance!

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George Foot wrote 09/17/2020 at 19:11 point

Haha, yes.  The average SD card leaves way more blank space in padding before the start of the first partition than the 6502 could ever dream of addressing, and exfat insists on 16-bit Unicode filenames... not really ideal!

I was going to write that project up here too but couldn't find a good way to present it in a kind of light multi-page tutorial format - for now it's over on github: https://github.com/gfoot/sdcard6502  But do let me know if you have any thoughts on how it could fit in here!

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Dan Maloney wrote 09/18/2020 at 20:16 point

The documentation on GitHub is fine, so honestly, just a separate project with a brief intro and a link to the repo is probably fine. Maybe add a few images just to grab eyeballs. Popping up to the top level of projects will gain a lot of traction with the users.

Good stuff!

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