With a working cross-assembler and basic design, I am ready to design the board the preparation was intended for. The outline specifications are –

• 68B09E clocked at 8MHz, as that is the chip I got from Jameco.
• I had 32k EEPROM chips from another project, so that was a simple choice.
• I also had some 512k SRAM chips, so one of those could provide a ram-disk or some other paged memory.
• The 6850 used on the original board doesn’t have any Baud-rate generating circuitry so I decided to replace that with a 68681, which also adds a second serial interface.
• If I want to run Flex or other DOS then I need some kind of storage, and Compact Flash seems easy to interface.
• Most importantly, and the reason for the project title, I added a 6859 DES encryption chip. I found some NOS parts for a couple of Euros each and thought it would be interesting to experiment with them. They only do 56-bit DES but there is still some kind of export control on them.

The detail implementation turned-out to be quite straightforward, with a couple of extra constraints to fit the ‘small steps’ approach. I knew there was a good chance of making errors in the design so I wanted to be able to implement the original one within the new one, which meant including a 6850 for early testing. Only the address of the chip changes, so if the monitor runs then I know I have both RAM and EEPROM working. From there I can use the monitor to check each feature in turn.

Memory Map

The peripherals are all mapped to a 2k address space between $F000 and $F7FF. After reset the rest of the upper 32k is mapped to the EEPROM when reading, and RAM when writing, but the EEPROM can be disabled to give 62k of RAM. The intention is that code in the EEPROM can be copied to RAM at the same address then the processor switches to RAM-only without any other functional change.

An extra twist is that a 4k segment between $E000 and $EFFF can be mapped to any 4k segment of RAM by writing to a single register.

There are enough complexities here to be a challenge to debug so I was reliant on the monitor and serial interface to get me started.

Schematic

This is the design created, that I was hoping was mostly functional

Initial schematic

PCB

This is the PCB I received, before I assembled it