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TX8 Retro computer

This is my retro inspired 8 bit 65C02 based home computer. It is a newly designed computer completely built on old integrated circuits.

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The TX8 is an old dream of mine. Ever since I got my first computer in 1980 my mind have constantly been building different computers with different features, graphical controllers, sound controllers and other weird stuff that was popular at the time.

Fast forwarding to 2020, With the human malware spreading around the globe, I have much more free time on my hands than I usually do. Said and done, during July 2020 I started populating a schematic with parts that I wanted to see in a possible computer. Also during this time I found the Pixelwizard web shop where I could actually buy a brand new C64 case. This paired with the fact that I have quite a few good C64 keyboards laying around I decided to use the C64 form factor for the PCB.

The PCB layout was finished and just before Christmas I received the first PCB's for the computer. Since than I have debugged most of the circuitry, found a few faults but nothing that couldn't be patched.

TX8 Specifications:

  1. 65C02 @ 2MHz CPU, 4MHz possible with a few updates
  2. 32KByte ROM (Flash memory)
  3. 128KByte RAM (SRAM)
  4. 2 RS232 serial ports
  5. 2 Joystick Ports (With real analog input)
  6. External I2C Port
  7. YM2149F and SID (either 6581 or 8580) sound chips
  8. TMS9929A graphics controller with TMS-RGB video encoder
  9. 32 KByte Graphics memory bank switched
  10. Internal W65C22 keyboard controller
  11. Compact Flash Card slot
Address map
The computer makes use of the entire addressable area that the
6502 processor provides. 

                 |-------------|
                 |    FLASH    |  256 byte
                 |-------------|
                 |     IO      |  256 byte
                 |-------------|
                 |             |
                 |    FLASH    |  15872 bytes FLASH
                 |             |
                 |-------------|
                 |             |
                 |   16KByte   |
                 |    banked   |  16384 bytes RAM
                 |     RAM     |
                 |             |
                 |-------------|
                 |             |
                 |             |
                 |             |
                 |             |
                 |   32Kbyte   |  32768 bytes RAM
                 |     RAM     |
                 |             |
                 |             |
                 |             |
                 |             |
                 |-------------|


RAM
The computer is designed to take up to 128Kbyte of RAM using a
monolithic 128Kbyte device. The lower 32Kbyte (0000 - 7FFF) is a
contiguous block. The following 16Kbyte area (8000 - BFFF) is a
windowed (banked) area where any 16K boundary memory chunk from
the available memory can be mapped in. 4 bank select bits are used
to select the bank the user wants to have access to. 

The first 64 Kbyte of the 128Kbyte is linerly mapped to the 64K
memory area of the 6502. All accesses between 8000 up to BFFF will
create a banked access. A banked access will map the bank select
bits onto addresses A14-A18 instead of the regular address bus thus
creating an access to the selected bank. Note that the entire
memory can be selected, including the parts that is in regulate
memory space (0000-7FFF, C000-FFFF).

FLASH
The system also contains a small flash memory (16KB) that should be
used be used for early boot. This memory can be disabled allowing
the system to access the RAM that is available from C000-FFFF.

The signal SHDW (Bit 6 on the output port of the SCN2681) is used
to enable or disable the ROM/FLASH memory. The output pin is set to
1 (logic high) after reset and should be set to 0 to disable the
ROM memory. The design idea was that when the ROM is enabled, the
RAM at the same address can still be written to which would enable
the user to copy the content the ROM 

I/O Space
256 bytes is allocated for hardware peripherals (I/O). This area is
located from FE00 - FEFF.

  Address range size Description 
  * FE00 - FE0F  16  W65C22 keyboard controller.
  * FE10 - FE1F  16  SCN2681 Dual UART controller.
  * FE20 - FE2F  16  PCF8584 I2C controller.
  * FE30 - FE3F  16  YM2149 Audio controller.
  * FE40 - FE5F  32  SID6581 Audio controller.
  * FE60 - FE5F  16  TMS9929ANL Graphic controller.
  * FE70 - FE6F  16  ADC0801 Analog to digital converter.
  * FE80 - FE7F  16  Compact Flash / IDE controller.
  * FE90 - FE9F  16  RTC72421 Real time clock
  * FEA0 - FEFF  96  Experimental I/O
  
BIOS
The BIOS provides the system with basic input, output and graphic
functionality. 128 call vectors are defined in ROM located from
FF00 up to FFFF. The top three vectors are the processor NMI,
RESET and IRQ vector and the rest are BIOS function calls.

A call to the BIOS is done with the following instructions:

BIOS_CALL:  JMP ($FF00, X)    ; This function will call the BIOS
                              ; pointed to by the the X register.

The user will then use the following instructions to call the BIOS.

            LDX #BIOS_GETCHAR
            JSR BIOS_CALL
            
* Notice this uses 65C02 specific instructions so this will not
work on older 6502 NMOS processors.

TX8.sch

EAGLE Schematic V0.2 for the TX8 Computer

sch - 1.34 MB - 01/15/2021 at 09:47

See BOM
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TX8.brd

EAGLE board file V0.2 for the TX8 Computer

brd - 942.08 kB - 01/15/2021 at 09:47

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TX8-SCH.pdf

PDF schematic V0.2 of the TX8 Computer

Adobe Portable Document Format - 69.47 kB - 01/15/2021 at 09:47

Preview
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TX8_MAIN_CSG.PLD

Main Chip Select Generator PLD

pld - 1.30 kB - 01/15/2021 at 09:17

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TX8_CSC.pld

Control Signals Creation PLD

pld - 2.44 kB - 01/15/2021 at 09:17

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View all 6 files

  • 1 × W65C02 Microprocessors, Microcontrollers, DSPs / Microprocessors (MPUs)
  • 1 × AT29C256 Memory ICs / FLASH Memory
  • 1 × TC551001 Memory ICs / Static RAM (SRAM)
  • 1 × W65C22 Microprocessors, Microcontrollers, DSPs / IO Controllers
  • 1 × SCN2681 Microprocessors, Microcontrollers, DSPs / IO Controllers

View all 16 components

  • Up and running =)

    Retro Chipguy01/30/2021 at 10:52 0 comments

    It has been a while since I had time to work on the TX8 but the past two days I managed to squeeze a few hours in.

    The last time working on the system I got the new TMS9929A devices in and they all seemed to be working. At the time I did not have a display connected so I assumed that when I could read and write data properly to the VRAM that the VDP was working. Unfortunately that was not the case. After finally building a SCART RGB cable for the system I could see that the monitor was getting a proper sync but the displayed pattern did not make any sense at all.

    After playing around (using BASIC) I noticed that the display memory seemed non linear. When writing a sequence of data to the display area I could see on the display that different segments of the display getting updated in a non linear way. Obviously that was not what I expected.

    I went back to the schematic and studied the VDP section and actually had to study it for a while before I caught my mistake. Can you spot the error ?

    The data sheet is extremely clear on how to connect the VRAM and I missed it. Look at the AD0 to AD7 pins of the VDP. I have mistakenly reversed the naming. This was probably done very early on the design process and I never caught it even though I spent months mulling over the schematic.

    Bah, never mind, mistakes were made but it is a rather complex design with a lot of different buses and signals.

    After fixing this error (cutting and replacing traces) the system started up as expected.

    The BASIC that I am running is a 65C02 enhanced version of ehBasic. ehBasic was written by Lee Davison and is a derivative of Microsoft BASIC. It is a bit slow and I wold have preferred an integer BASIC but it has proven instrumental in debugging the hardware.

    In the next update I will talk a little about implementing the keyboard driver.

  • New TMS9929ANL chips arrivied

    Retro Chipguy01/20/2021 at 09:29 0 comments

    So the new TMS9929ANL chips finally arrived. For those of you that have been following me on Instagram you will know that the first chips that I bought on eBay turned out to be fake ones. This time I turned to a few different sources to ensure that I at least got a few working units. The first devices to arrive was from a contact that I have in Shenzhen which I also use professionally to source parts that are difficult to get here in the west. He actually got me 10 samples for $0.85 which is a very fair price for these devices.

    Anyway, a bit skeptic I started to do the acetone test.... All good, none of the paint came off. While doing this I also noticed a small molded Texas Instruments logotype in one of the blank circles on the top of the device which made me feel even better. You can se it in picture if you look closely.

    Now for the real test. Would I get the 10.73 MHz oscillator running ? (drum-roll)

    YES !! it works. A clean oscillator signal is present at pin 40 (If you want to measure this signal accurately do not measure the signal on pin 39. The capacitance of the probe will affect the oscillator and show you an incorrect frequency). The frequency is coming in a bit high at 10.739 but this is easily correct by adjusting C6 and C7. A trimmer cap would have been handy here but it won't take to long to tune the values.
    Second stage of the testing was to install the DRAM's and make sure that I can write data and read it back properly. So I wrote a short test program that wrote a test pattern to the memory and verified that it would read back properly. I let the program run for a few hours and no errors were found during this time. I also verified all the setup and hold time parameters with an oscilloscope,  just to put my mind at ease. The VDP seem to perform significantly better than specified which means the timing margins are very good.

    The DRAM's that I use are new old stock that I have been holding on to for decades. During the summer of 1984 I was working for a company assembling cardiographic measuring machines. These machines had a big CPU board with an i8085 CPU and a bucket load of TTL's and IO devices. My job was to test the boards and install them into the machines. All main boards that failed tests were scrapped, no repairs were done. Every board had 128Kbyte (16 pcs) of these MCM6665AL20 and I was allowed to strip the DRAMs from these boards and take home. I have kept them all of these years knowing it would come in handy some day =).

    Anyway, the conclusion for today is that the TMS9929ANL and the DRAM circuitry seem to be doing its thing. I haven't tested connecting a monitor to it yet so the verdict is still out.

    The next step is to install the RGB modulator and start testing that part of the circuitry so stay tuned.

  • TMS-RGB module

    Retro Chipguy01/15/2021 at 09:44 0 comments

    The first prototype samples of the TMS-RGB module for the TMS9929A were finished today.  and they look great. Now all I need is the actual TMS9929A devices to start testing everything out.

    Looks great doesn't it.

    I take no credit for the actual design, it was done by Nicholas Pigdeon (@npigdeon) and his story is available on http://tms-rgb.com. I only re did the layout using smaller components with the aim to make it a very small module. I could probably have shaved off a few mm's more from it but I was satisfied with the result.

    Testing will start as soon as I have a 9929A running in the TX8 computer.

  • First entry

    Retro Chipguy01/14/2021 at 16:29 0 comments

    So the first log entry =)

    So, just to summarize where I am at right now.

    The processor section, keyboard controller, Compact Flash and the UART sections of the board have been built and tested. A few small minor bugs were found and corrected on the PCB, nothing major so far.  All  electrical parameters such as setup times, hold times etc have been verified so I know that the design is good.

    I opted for PLD's for all the select logic so I am able to do pretty cool stuff with it. For instance, all IO is injected into ROM space at $FE00 and the IO page is 256 byte long.  Here I can assign chip selects to any address on a 16 byte boundary which makes the IO area almost invisible.,

    I am currently running a version of the NoICE debugger fw on the board which makes it super easy to download new software and single step the program on my windows computer.

    The first real snag that hit me was that the TMS9929 chips that I purchased were fake. Very easy to detect to. Just had to rub the devices with a little acetone and the paint came right off. very annoying. Got my money back and have purchased new chips from a supplier that was recommended to me. But it takes forever for them to arrive so in the mean time I am doing some software development instead.

    The main reason for installing the compact flash card on the PCB was that I wanted to write a simple file system for 65C02, so this is what I am doing right now.

View all 4 project logs

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