Keeping Time with Turing

Decoding WWVB with a Turing Machine

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Making a self-setting clock by decoding the WWVB signal with a TTL Turing machine.

The real purpose of the project is to develop a pair of reusable modules. One module for accurate time acquisition and the other for general purpose computation.

This time module tunes in to the WWVB signal at 60kHz and outputs an encoded digital stream. At the moment, the antenna is little more than a coiled up ethernet cable with a capacitor soldered to each end. Really, that's all it is. The signal from the antenna is amplified by a complementary transistor pair in a folded cascode configuration and passed on to an op-amp analog filter and an op-amp rectifier. A comparator then decides whether the WWVB carrier is at its high amplitude or low amplitude.

The pulse width modulated time signal triggers a 74x221  and a 555 oscillator to control a 74x93 counter. The 555 oscillates at 10Hz, and the 221's time interval is about 0.9 seconds. The result is that the counter will show a final count of 2, 5, or 8 before being reset. (Let's disregard noise in the signal, for now.) Those values correspond to 0.2, 0.5 and 0.8 second modulation durations that are transmitted. A miniscule amount processing can turn that stream of digits in to the current time and date.

The Turing machine decoder is nearing completion, so there's only an overview for now. The 'tape' consists of an 8 bit up/down counter and a 256x4 SRAM. Those 4 bits are combined with 8 'state' bits held in a latch. Four bits are available to select the time zone offset, daylight saving flag, and display options. One last bit is used to select a high or low address in an EPROM. The 16 bit output then updates the state, writes a new value to the tape, and selects which data source (WWVB or tape) is in use.


It's working. Here a Z8 is used to decode and display the time on an ISD2010 LED dot-matrix.

JPEG Image - 197.52 kB - 03/29/2021 at 19:50



A close-up look at the working receiver. Not shown is the Z8 working as decoder and display driver.

JPEG Image - 142.53 kB - 03/29/2021 at 19:50


  • 1 × am93422 Memory ICs / Static RAM (SRAM)
  • 1 × am27c010 Memory ICs / PROMs, OTP PROMs
  • 1 × 74hct646 Logic ICs / Receivers, Transceivers
  • 1 × 74hct273 Electronic Components / Misc. Electronic Components
  • 1 × 74hct257 Logic ICs / Decoders, Encoders, Multiplexers, Demultiplexers

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  • Stupid PLD Tricks?

    Darrin B07/21/2021 at 15:11 0 comments

    Early on, I chose quadrature clock to control the system. It would yield a 50% duty cycle, lots of useful timing states and, in a typical implementation, the complements of both timing signals. While I was working out the gating arrangements for the various latches, write lines, and other control signals, I noticed that state sequence of the clock was identical to that of a Johnson counter. Those are synchronous counters that can be implemented in a typical PLD, with plenty logic cells remaining for other uses.

    Recucing the chip count on a protoboard is always welcome, add in some re-programmable logic (in case I goofed up DeMorganizing) and I see a win. Theres one last chip that may be merged in to the GAL16V8 that I had in mind, a 74HCT00 that is mostly used as the clock oscillator. Can I make a GAL be its' own clock source?

    The flip-flop in the output cell of the GAL-V chips can be bypassed, allowing an output to act as an ordinary logic device. Looking at a few oscillator schematics, most could be implemented with inverters or inverter and buffer combinations. After a trial, or two, it occurred to me to upgrade the inverter and buffer to XOR gates. Now I have selectable invert or non-inverting inputs for both devices, by simply moving a jumper to VCC or Gnd, respectively.

    An appnote from OnSemi provided some useful insight in to building the oscillator. The first few attempts didn't work, but then one variation oscillated when I powered down the circuit. Some poking and prodding later... Oh, right gate input current. The gate input isn't the gate, it's the source terminal. Check the datasheet, the input leakage is up to 100uA, with a 0.8V logic threshold. Drop a 7.5k resistor in there, it starts up every time! The only rant is that the duty cycle is around 40%, but connecting the oscillator output to the clock input of the same GAL to drive the registered outputs of the counter will clean that up.

    It is an odd looking thing, but it is a variable frequency oscillator and quadrature clock divider that uses just 4 cells of a PLD. I wasn't planning to make this a PLD centric project, they're just so handy.

  • Parts shortage?

    Darrin B06/26/2021 at 17:10 0 comments

    Prototyping with pulled parts has pitfalls. I needed one more 555 to test a GAL16V8[1] based counter. Why GAL based? My preferred sources didn't have any 74x469 or '491s in stock, and I've been meaning to fool around with some GALs. Considering the parts I tend to favor, it's odd that I don't have any sort of ROM burner laying around. No matter, that's what the Z8 dev board is for. Between GALasm and ATFBlast docs, I built a working programmer. I cheated a bit, though. First, I didn't bother with proper logic level interfacing, and I used the SPI port for the serial data transfers (reverse the bit order). After a bit of learning, problem solving, debugging, and DeMorgan-izing, I had a counter ready for testing. The output was gibberish. Back one step, more code, debugging, more de-coupling capacitors, WinCUPL, test cases, Re-Morgan-izing, and now hair-pulling. About one month of this passes, but a simplified counter has just one error in the count. It is jumping from 255 to 1, despite the LSB term being:


    How can this be? I hooked up flip-flop, an XOR gate, and a few LEDs, just to watch this last clock cycle. The problem disappeared. The flip-flop output should match the output of the Q0 output of the GAL with the XOR lighting a LED when it doesn't. It never lit. Check again. Still working. The other LED? It is on the high-side of the 555's output. Take it out, and the bug returns! I've never seen a 555 with an open-collector output before. My parts shortage has an open. Just goes to show that one can never have enough 555s.

    I'll have to keep this 555 handy, could be helpful should I ever need to reverse-engineer a locked GAL16.

    Just a few changes to the down-counting logic, and now I have an 8 bit up/down counter that mostly fits in a single GAL16V8. All it needs is an external pair of Wired-OR and a pair of Wired-AND gates to fit in a breadboard friendly 12 pin wide footprint.

  • Interlude and Here's a Hack

    Darrin B04/03/2021 at 17:19 0 comments

    Just as I begin building the Turing machine part of this project, I get an insight in to how to better balance the bias voltages in the folded cascode input stage. After a quick recalculation of the voltages and currents, SPICE is reporting nearly 70dB gain at 60kHz. Oh my. I may need that AGC circuit, after all.

    With the digital clocking logic built, I began to build the 'tape' part of the system. The plan was to use a 16 bit up/down counter to pluck a value from an SRAM chip. Nope, no 8 bit up/down counter chips on hand. Sadly, there is only one 4 bit up/down counter chip in the stash. (Even looked over some old mother boards.) Implement a counter with gates and flip-flops? Madness!

    Since the result is derived from the input, would an EPROM be a solution? Each 8 bit value would require 2 values, one would be "up", the other "down". Using a 74x273 latch to hold the previous output of the EPROM, a new clock pulse to the latch would latch a new value based on the status of the up/down signal. This could work.

  • Got Time

    Darrin B03/26/2021 at 16:57 0 comments

    A better antenna, folded cascode input amplifier, and a little bit of code yields the current time!

    The antenna is simply 4 turns of unshielded, twisted pair cat-3 wrapped in a 40 cm. (15 in.) loop, held together with wire twist-ties. The individual wires are connected to form 28-turn continuous loop, in parallel with a 0.01uF capacitor to tune the loop to 60kHz. The remaining 4 turns are made in to a second loop, where one end is the input to the receiver and the other is connected to an end of the 28-turn loop and ground.

    As I twiddled with the simulation of the new input amplifier, the gain was heading toward 40dB, not bad for a 2N3904 / 2N3906 pair. When build time came, the constant-current source in the simulated circuit was replaced with a resistor on the breadboard, with little change in performance.

    Trading the full-wave rectifier for a half-wave with a peak detector allows for even more gain. During testing, I had to dial the signal generator to the minimum output to not have clipping at the peak detector. Neither my oscilloscope nor voltmeter could measure the input signal.

    Turning the peak detector's output in to a nice 3.3V logic was quite an exercise. Initially, I used a fixed threshold, which worked well enough. Considering the varying nature of the input signal, a variable threshold for the comparator seemed to be necessary. A few days in that rabbit-hole, and things are no better. Finally, I settled on using a simple resistor-capacitor, with a long time constant, to provide the varying input for the comparator.

    Here is the current design, with a handy output for 3.3V logic:

    I'm still considering turning the gain up little more, along with adding a gain control circuit to the mix. That's for another time, I want to build a Turing machine!

  • Staying Grounded

    Darrin B03/20/2021 at 19:26 0 comments

    Turns out that what I thought would be a quick test, became anything but. After writing a preliminary WWVB decoder and display driver, I hitched the receiver up to a Z8 dev-board. Suddenly, there is no signal. Eventually, I worked out that the scope gave the receiver a very nice earth ground, and that using a 5V wall-wart for power took that ground away.

    Because I am prototyping this on a solderless breadboard, I understood that the circuit's behavior would be a bit off from the calculated value. With the signal at 60kHz and using relatively low resistance values in the filter, a few picofarads shouldn't make a huge difference, right? There was some, so a few changes were made and some more gain was found.

    There still remains to choose an antenna. A long-wire antenna is usually the easiest to implement, until one realizes that the wavelength of a 60kHz signal is 5km. Yeah, that's over 3 miles of wire! The Mountain House is on a fair-sized patch of nowhere, but even a quarter-wave would go way out of bounds. A ferrite rod from an A.M. radio could be pressed in to service, but would need re-winding. That could be a lot of effort for an insufficient result. A promising alternative is a loop antenna, specifically a "small" loop. The definition of small in this context appears to be an antenna that is less than 10% of the wavelength. I'm starting with 100 m. of wire...

  • Better Blinken

    Darrin B03/10/2021 at 00:44 0 comments

    This project seems to be at the point where I could tack on a Z8 and call it done. I may hook up the Z chip as proof-of-concept for the input section, but the goal is still the Turing machine decoder. All that is needed to build to this stage is a bunch of passives, a transistor, a quad op-amp, and a comparator.

    Here is what is on the proto-board at the moment:

    The circuit starts with a quick and dirty 2.5-ish volt tap that becomes the op-amp ground reference. Next up is a fairly basic transistor amplifier. Most any general purpose transistor will work for 60kHz WWVB signal. Now the hard part, two sections of the op-amp form a 60kHz filter with a lot of gain. I have to  thank Analog's Filter Wizard for taking care of the heavy lifting. The nice looking sinewave at the output of the filter is fed to a precision full-wave rectifier and output filter capacitor, like it is a DC power supply. That DC voltage causes the comparator to switch the LED on and off as the WWVB carrier changes.

    Well, why not? I'm going to hunt down a dev-board...

  • Getting Started

    Darrin B03/05/2021 at 22:20 0 comments

    To say that this project is underway may be overstating the status, a little. The receiver is blinking to the tune of WWVB, more or less. A better antenna, more gain, and more selectivity would be nice additions. First is to upgrade the TL072 op-amps to a device with a bit more gain-bandwidth and possibly one specified for 5V operation. But, it blinks!

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