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The PolarFire jobs

A project log for PEAC Pisano with End-Around Carry algorithm

Add X to Y and Y to X, says the song. And carry on.

Yann Guidon / YGDESYann Guidon / YGDES 07/31/2021 at 21:100 Comments

Going back to the PolarFire FPGA manual (PDF), let's look at the Math Block.

The block can reach 400 MHz though it is not clear under which conditions.

This will not be hard to reach because 6 inputs will be tied to constants so the Pre-adder and the Multiplier sub-blocks will not be active or contribute latency.

The inputs A[17:0], B[17:0], D[17:0], PASUB, SUB and ARSHIFT17 are tied to 0.

CDOUT[47:0] and OVFL_CARRYOUT are ignored.

This leaves 5 inputs that can be combined to provide one of 3 operations:

In the original idea,

But there are two problems:

...

While the first problem can be solved by a MUX on C[47:0], the second is a big setback.

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