There was enough resources to put my ANSI Terminal into the FPGA. It displays on a VGA monitor and input comes from a PS/2 keyboard. The ANSI Terminal uses my IOP16 CPU. The terminal connects via an internal 9600 baud serial connection.
The IOP16 code is pretty simple. The only "tricky" part is adding MARK parity when sending serial data to the PDP-8 serial in and stripping off the MARK parity when sending the data out of the PDP-8 into the VDU.
000 0x2003 LRI Reg0 0X03 RESET TERMINAL COMMAND 001 0x7002 IOW Reg0 IO_02 WRITE VDU CMD REG 002 0x2003 LRI Reg0 0X03 RESET UART COMMAND 003 0x7000 IOW Reg0 IO_00 WRITE UART CMD REG 004 0x2020 LRI Reg0 0X20 TX CTRLS RTS 005 0x7002 IOW Reg0 IO_02 WRITE VDU CMD REG 006 0x2020 LRI Reg0 0X20 TX CTRLS RTS 007 0x7000 IOW Reg0 IO_00 WRITE UART CMD REG 008 START 0xA00B JSR KB2PDP KEYBOARD TO PDP-8 009 0xA012 JSR PDP2VDU PDP-8 TO VGA 00a 0xE008 JMP START LOOP FOREVER 00b KB2PDP 0x6004 IOR Reg0 IO_04 READ KBD STATUS 00c 0x8001 ARI Reg0 0X01 MASK RX DATA PRESENT BIT 00d 0xC004 BEZ NOKDBD NO KBD DATA 00e 0x6005 IOR Reg0 IO_05 READ KBD DATA 00f 0x9080 ORI Reg0 0X80 MARK PARITY 010 0x7001 IOW Reg0 IO_01 WRITE TO UART DATA 011 NOKDBD 0xB000 RTS DONE KEYBOARD TO UART 012 PDP2VDU 0x6000 IOR Reg0 IO_00 PDP-11 TO VDU 013 0x8001 ARI Reg0 0X01 MASK RX DATA PRESENT BIT 014 0xC004 BEZ NOPDPD NO UART DATA 015 0x6001 IOR Reg0 IO_01 READ UART DATA 016 0x807F ARI Reg0 0X7F 8 TO 7 BITS 017 0x7003 IOW Reg0 IO_03 WRITE OUT SCREEN 018 NOPDPD 0xB000 RTS DONE UART TO VGA
Resources
It worked!
Discussions
Become a Hackaday.io Member
Create an account to leave a comment. Already have an account? Log In.
Location 012 - Surely it is a PDP8?
Are you sure? yes | no