Binary serial transmissions are among the most widely used techniques for sharing information between devices by using wired or unwired transmissions. Within these transmissions, data errors are one of the most important problems that must be analyzed to obtain a reliable communication system.

The parity generating/checking method is one of the most widely used error detection techniques for data transmission; a parity bit is appended to the transmitted data to make the binary data’s sum of 1s either even or odd. This bit is used to detect errors during the transmission of binary data.

The message containing the data bits, along with parity bit, is transmitted from transmitter node to receiver node. In the receiver node, the number of high bits in the message is counted. If this number doesn’t match with the parity bit transmitted it means there is an error in the received data.

There are several different brands of commercial IC’s (CD40101, 74HC/HCT280) that implement the parity generator/checker. Supplementing a Dialog GreenPAK design can positively affect the affordability, size, and modularity of the design. For example, the same general GreenPAK design can be used whether the intended I/O is active-high, active-low, or a mix. In this project, the digital logic required to implement an integrated parity generator/checker managed by control signals is implemented. To do this, the project implements two variants of parity checking. The first variant has a parallel input so that the data bits to be verified are loaded simultaneously. The second variant implements a serial input, loading the data with an asynchronous serial data transmission. To do this, a serial to parallel conversion is implemented within the GreenPAK.

To implement the parallel input binary parity generator and checker a SLG46536V is used. To implement the serial input variant a SLG46620V is used.

Below we described steps needed to understand how the binary parity generator and checker has been programmed. However, if you just want to get the result of programming, download GreenPAK software to view the already completed GreenPAK Design File. Plug the GreenPAK Development Kit to your computer and hit the program to design the device.

Digital Communications and Parity Bit

In digital communications, a parity bit is a bit added to a binary stream to ensure that the total number of 1-valued bits is even or odd. This technique is a simple and widely used method for detecting errors. There are two types of parity bit methods, called even parity bit and odd parity bit.

The odd parity bit system consists of counting the occurrences of bits whose value is 1 in the data stream. If the number is even, the parity bit value is set to 1, so the total count of occurrences of high bits in the entire stream including the parity bit is odd. If the count of high bits is odd, the parity bit value is 0. An example is shown in Figure 1.


Figure 1: Odd Parity Binary Stream

The even parity bit method employs inverse logic. If the count of bits with a value of 1 is even in the data stream, the parity bit value is set to 0 making the total count of high bits in the entire stream including the parity an even number. If the count of bits with a value of 1 is odd, the parity bit is set to 1 so the entire stream has an even number of high bits.


Figure 2: System Diagram

To detect errors, a receiver must calculate the parity bit of the received binary data stream and compare it with the received parity bit. If parity bits are the same, an error is not detected. If they are different, an error is detected.

The parity bit is only useful for detecting errors. It cannot correct any errors, because it is not possible to determine which bit is incorrect within the stream. If a binary stream with errors is received, the receiver must discard it.

This makes the parity bit error method not suitable for high noise to signal ratio mediums,...

Read more »