At this point, I'm pretty much sold on the DAC/analog sections of the design. While it's undoubtedly possible to do better, I'm satisfied with the performance. I'm still a little bit put out by the idle noise, so I am going to try another receiver chip to see if it helps. The new nominee is the WM8804. It's an SSOP-20 package instead of QFN, which is easier to deal with. One big difference is that this chip requires a 12 MHz crystal. Hopefully on PLL unlock it can supply either no clock or a sufficiently fast clock that the DAC won't be noisy.