Homemade Floating Point Interpreter for 6502

The CI-2 is a homemade floating point simple interpreter language by hand assembling for my 6502 computer PERSEUS-8.

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I have a dream. It is to build a floating-point computer programming system by myself. Here is a description of the challenge. Currently, there are already many programming languages in existence, and precision floating point arithmetic and function value calculation have been put to practical use. Here, I would like to take a method that I find easy to create, without being bound by standardized specifications. The concepts are as follows.
(1) The development environment will be completed only on PERSEUS-8 without using any other computer. This is to re-evaluate the value of a computer that has toggle switches as its user interface.
(2) Attempt to implement elementary functions such as sine, exponential, etc. in order to make it somewhat practical.
The assembly code of the system is shown in the attached file (ASSEMBLY_CODE_CI-2_V1_2_0.pdf).
(3) As an application program, I will try to program signal processing, which has been widely used from the 1970s to the present computers.

1. System requirements

    The CPU of the computer to be run is the 6502, which was widely used about 45 years ago. The total memory requirement for the system and user area is 16kB. The user interface uses a RS232C serial terminal. Figure 1 shows the execution of this interpreter CI-2 (Computation Interpreter -2).

                                                Fig.1  Floating point interpreter CI-2 running on my 6502 computer PERSEUS-8

2. Language specification

    The language specifications are listed in the following. This specification was not defined exactly at the beginning, but was the result of trial and error. The details of the language specification are shown in the attached file (Specification of Floating Point Computation Interpreter CI-2 V1_1.pdf).

    The numeric values were set to 32-bit single-precision floating-point type. In order to simplify the conversion of ASCII code to numbers, BCD notation was used instead of binary. Therefore, the number of significant digits and the numerical range are inferior to those of general single-precision arithmetic systems. In order to avoid parsing, variables and instructions were defined as single letters of the alphabet. The formula uses RPN (Reverse Polish Notation). This is also to avoid parsing.

    There are three one-dimensional array variables:)X,)Y,)Z. The arguments range from 0 to 255. This alone occupies 3kB of memory. There is no statement equivalent to a FOR loop, but I decided to use a conditional branch and a jump to the specified line number instead. Therefore, it is not suitable for large-scale programming.

    The following is an example of programming description and its execution. The line number 230 ‘N)X=N P K** M/)S’ is ‘X(N)=sin((K*P*N)/M)’ in a typical language description. The line number 480 ‘L M?< 445!’ means ‘if L<M then go to 445’. Command ‘@’ from the terminal is the display of the program list, and command ‘!’ is to execute the program.

3. Software configuration 

    Figure 2 shows the block diagram of this interpreter system. The system will wait for one line of input after startup. After inputting a single line from the serial interface, it analyzes it one character at a time from the left of the line buffer. Here, if a line number is detected at the beginning of a line, the process moves to the line editor. If no line number is detected, parse one character at a time as direct execution mode. This ‘MAIN LOOP’ process is mapped from address $E8F0 in the assembly code. If it is a number, it is converted to BCD and stored in the floating point register. This ‘GET FLOATING POINT’ process is mapped from address $E0F7 in the assembly code. If it is an arithmetic operator or a command, it moves to the respective processing routine. If a ‘CR’ code is detected, perform the assignment and register value display, and return to waiting for one-line input. This ‘END LINE’ process is mapped from address $EDB9 in the assembly code.

    Program execution is performed by setting the execution flag upon detection of a ‘! ‘ code and the execution flag is set. Once the execution flag is raised, a single line of analysis is executed from the beginning of the program area. In the case of a conditional branch statement, the line with the line number that matches the line number of the jump destination is searched from the top of the program and executed from there. This ‘CONDITION’ process is mapped from address $EBF0 in the assembly code.

4. Floating point expression

    The floating point expression in this system is shown in Fig. 3. A floating-point variable consists of a 3-byte 24-bit mantissa part, a 7-bit exponent part, and a 1-bit mantissa sign. I use BCD for...

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Assembly code of the Floating Point Interpreter CI-2

Adobe Portable Document Format - 401.04 kB - 04/09/2022 at 13:52



Application program of Poisson distribution

Adobe Portable Document Format - 19.51 kB - 01/26/2022 at 12:32



Application program of noise and sin cos signal generation and Fast Fourier Transform

Adobe Portable Document Format - 31.35 kB - 01/24/2022 at 14:59


Specification of Floating Point Computation Interpreter CI-2 V1_1.pdf

Specification of the Floating Point Interpreter CI-2

Adobe Portable Document Format - 65.87 kB - 09/04/2021 at 11:55



Sample program of testing exp function and conditional branch for loop execution

Adobe Portable Document Format - 16.30 kB - 08/06/2021 at 06:15


View all 6 files

  • CI-2 project log

    Mitsuru Yamada08/10/2021 at 13:00 0 comments

    1. The article was first posted on Aug. 6, 2021

    2. Revised on Aug. 10, 2021

         Corrected mistake in Fig. 3.

    3. Revised on Sep. 4, 2021

        Updated the assembly code to Ver. 1.1.0. The exponent part is always set to zero when the result of an operation is zero.

        As an application example, Fast Fourier Transform program and execution example were added to the attachment.

        Added single lowercase letters to variable names.

    4. Revised on Nov. 4, 2021

        Added  Chapter 11, "Making ROMs of the interpreter" to the Details.

    5. Revised on Dec. 31, 2021, Jan. 4, 2022

        To the Details, added programming & execution example, Fig. 7 "Calculation of natural logarithm function" and corrected Fig. 6.

    6. Revised on Jan. 24, 2022

        To the Details, inserted new chapter 10, "Application example", new Fig. 9.

        Added maximum operating clock frequency value to the chapter "Making ROMs of the interpreter".

    7.  Revised on Mar. 5, 2022

        To the Details chapter 10, added video link "Homemade Floating Point Interpreter computes FFT".

    8. Revised on Apr. 9, 2022

        Updated assembly code version to Ver. 1.2.0, for bug fix for square root function argument zero.

    9. Revised on May 13, 2022

        Added Fig. 6 for square root calculation and Fig. 7 for sine function calculation to chapter 6 "Elementary functions".

    10. Revised on May 14, 2022

        Added handling of negative arguments to the description of the exponential function calculation in Chapter 6.

View project log

Enjoy this project?



don.ware wrote 09/23/2021 at 14:04 point

As always, this is an excellent presentation from you. I will have to sit quietly and study it further. Thanks !

  Are you sure? yes | no

Mitsuru Yamada wrote 09/24/2021 at 00:38 point

Thank you very much. It's quite difficult to explain these software. If I give too many detailed explanations, many people will probably not find it interesting to read. This time, I focused on the main points I wanted to convey.

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zpekic wrote 09/05/2021 at 02:41 point

Super cool project! I was toying with the idea of creating a BCD floating point component using my microcode language / compiler. I have some experience with floating point as I recreated the Texas Instruments calculator chip based on another project. Even bigger challenge would be to re-create a AMD Am9511 FPU accelerator core!

On the side code, I also wonder about using 10's complement for exponent, as it is different than the mantissa format. I am bit familiar with BCD and I wrote a add/sub ALU with binary/decimal, actually very similar to 6502 patent (with D bit). Wouldn't it be better to use bit 7 and bit 6 as signs in the exponent byte, which would still leave exponent in 00-39 range.

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Mitsuru Yamada wrote 09/05/2021 at 06:55 point

Thank you for your advice. At first, I considered allocating three bytes for the mantissa part and one byte for the exponent part in the same format. That was simple, but in order to make the number of digits in the mantissa part as large as possible, considering the generation of elementary functions, etc., I placed the sign bit of the mantissa in the exponent byte. 

Then 7 bits are the exponent, which can be done in three ways: the signed absolute value same as the mantissa part, the complement, or a positive number in offset form. There are three possible ways to do this: a signed absolute value like the mantissa part, the complement, or a positive number in offset form. I started with the complement for now, and realized halfway through that it was a bit of a hassle, but I ended up completing it this way. 

Since It often need to compare the exponents in the normalization before floating-point addition and subtraction, and to add and subtract exponents in multiplication and division, I think a format that allows me to do this simply is probably the best. So, in general, I think an offset method is used for the exponent part instead of the complement.

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zpekic wrote 09/08/2021 at 04:03 point

So your offset for exponent is 50, everything below 50 is negative, and over 50 positive exponent? This is trick used to spare the exponent sign. I wonder if same could be applied to mantissa too, and use offset 0.5 to represent zero, and that way save the mantissa sign too. Of course, the problem is that negative number would be represented weirdly. Probably not a good idea, never seen such encoding :-)

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Paul Fernquist wrote 08/10/2021 at 04:08 point

The exponent is 1's complement . The mantissa is 2's complement. Calling them a complement is a little strange,  to me. I designed a floating point divide instruction for a mainframe many many years ago so  my memory is a little fuzzy. Sounds like a fun learning experience..

  Are you sure? yes | no

Mitsuru Yamada wrote 08/10/2021 at 06:51 point

Thank you for your comment. The exponent part is used by converting 8 bits of BCD (Binary Coded Decimal), which is specific to this CPU, to 7 bits. The example values are +39(BCD)='0111001', +1(BCD)='0000001', 0(BCD)='0000000', -1(BCD)='1111001', -39(BCD)='1000001', which is different from the general 2's complement and 1's complement. I think the lower 4 bits are probably better described as 10's complement. I'd like to consider how to explain it better.

Figure 3 was wrong and has been corrected. I apologize for the error.

  Are you sure? yes | no

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