The best way to test a timing PAL design would be to run it with a real Applix. That is unlikely to be available.  The next best solution would be to drive it from a different 68000 system. My first thought was to use an 8-bit  68008 lashed to a ROM and RAM, making dummy video accesses. I have some spare 68000 and 68008 chips in DIP form. Wiring up memory chips is a chore though.

Then I realised that I already have a 16-bit 68000 board here: https://hackaday.io/project/28960-stebus-68000

I also have a bare Atari STE board, so I can compare my video DRAM control signal timings to the Atari's own signal timings. That sounds an even better idea. A small snag is that its DRAM modules are in SIP sockets held in wobbly turned-pin sockets. It had been used as a test bench to test DRAM modules. I'd have to make that bit robust and get it working first. That's another project on the to-do list...