W65C02SXB investigation

Evaluating the W65C02SXB development board

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A look at the W65C02SXB development board, as a starting point for new projects.

After investigating the 65C816 board, I concluded that the extra features made it harder to use legacy software like the BBC micro firmware - code and the extra hardware vectors overlap. You can disable 68C816 mode, but if you do then there is not much point in paying extra for the board. It also gets in the way of disassembling code, because you can't be sure which mode that machine code is being run in.

So I bought the 65C02 board and disassembled the firmware. Not to rip off WDC in any way, but to see how it uses the USB port. I can then adapt the code for my own projects.

The board uses a 65C22 to operate the USB FIFO module control signals and data bus. I prefer to do this with a little logic and direct connection to the data bus. Perhaps the USB module can't run as fast as the 65C02 bus cycles? 


Mini65 source code hacked to use the USB port of the W65C02SXB. Not tested yet! Intention is to read an input bit, to control whether to boot into TIDE or BBC BASIC. I need to think how to switch the NMI and IRQ code between the two systems.

plain - 11.94 kB - 02/18/2024 at 22:48



Fortunately the modified code still fits inside 512 bytes!

plain - 38.48 kB - 02/18/2024 at 22:48



J.G. Harston's minimalist 6502 MOS modified to conventional assembler syntax. Assembles online and verified against known-good ROM image.

text/plain - 9.65 kB - 11/17/2021 at 21:07



Mini65.a65.txt output listing.

text/plain - 33.73 kB - 11/17/2021 at 21:07


Rough disassembly information file

plain - 7.45 kB - 11/07/2021 at 14:56


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  • Design flaws

    Keith01/20/2022 at 22:26 0 comments

    • The 65C51 UART has a bug, with no intention of fixing it.
      It has no FIFO buffer, which is a problem with FTDI USB chips that send up to three bytes after the hardware handshake line tells them to stop.
    • The Flash ROM is a PLCC. Most hobbyist programmers have DIP ZIF sockets, and will need an adaptor to handle a PLCC chip. And an extractor tool to get it out of PLCC sockets.
    • The ready signal (RDY) is not on the expansion bus.
      I want to be able to slow down the CPU for chips that do not run at 14 MHz. RDY would need a flying wire.
    • Flash ROM highest address bit is pulled high, and switched by Terbium software.
      I want to be able to replace the Terbium software with my own ROM code, without having to go through Terbium.
    • The sockets are surface mount. This makes it much harder to modify, which I want to do for the previous points.

    To attach wires to the circuit, one may have to take chips out of sockets to fine solder wires to the socket pads. 


    Keith11/14/2021 at 18:05 0 comments

    I feel it would be easier to let them stay there and modify BBC BASIC to set the RAMTOP variable slightly lower.

    The BBC Micro has the 16K BASIC ROM at 8000 hex and the 16K MOS at C000. This conflicts with the Terbium IDE which sits in the first 1.3K at 8000.

    The Acorn Atom's BBC BASIC board for the Acorn Atom moves the I/O space from B000 to 7000 hex, out the way of the Terbium IDE hardware. The firmware might be a good starting point, because it omits most of the BBC Micro peripherals (which the WD65C02SXB doesn't have either). The firmware has routines to drive 256x192 graphics, provided by the 6847 chip. This would be much easier to implement than BBC Micro compatible graphics.

    The BBC Micro 6502 second processor used just a 2K for the MOS and I/O, allowing BBC BASIC to be relocated at B800.

    This allows the Flash ROM to contain BBC BASIC, and 2K for OS ROM and I/O starting at F800.

    So the job is to write a small OS that just implements console I/O. This could be through the 65C51  serial chip (which has a handshaking flag bug), or the USB module (the IDE would have to disconnect), or the 65C22 VIA (maybe talking to another USB module).

    I have had a look at J.G. Harston's latest code for the Acorn Atom BBC BASIC conversion board MOS. He has spotted many errors. I have edited it to assemble online at, and have tried to make the labels more informative. Although still 4K, it has code for driving the 6522, 8255 and 6847.

    J.G. Harston's has code for a tiny 6502 Tube Client in 512 bytes. Implements OSWRCH and OSRDCH via a single I/O port:

    It is in BBC BASIC's unconventional assembler. I don't have a BBC micro so I started converting it to a more conventional assembler syntax.

    I wondered if the Terbium IDE and BBC BASIC could co-exist. Terbium uses the first four bytes of page zero, but so does BBC BASIC:

    00-01 LOMEM (LO-HI) pointer to start of BASIC variables
    02-03 VARTOP (LO-HI) pointer to end of BASIC variables

    BBC BASIC does have some spare page-zero bytes but that would require modding the IDE code. Or BBC BASIC. This might disrupt either environment.

    I feel it might be best that the reset routine reads a switch on an input port, then runs either Terbium IDE or BBC BASIC. 


    When developing 6502 software, you will probably want to change the reset and interrupt vectors at the end of the memory map. With TIDE, it isn't possible. You can tell tide to switch in a new 32K bank of ROM but then TIDE software is switched out. Pulling out the USB cable cuts the power and when plugged in again the board will reset to the TIDE software. 

    A way round this may be to start in TIDE, use TIDE to switch in the new ROM, then close TIDE to release the USB connection for a terminal emulator.

    It would be a nuisance doing it every time, but this is just a development project to demonstrate the code works. I thought of hacking the PCB but the tracks are very fine and the PLCC sockets are surface mounted! There is no way to tack vero wire to socket pins! I don't think this board was built with enough thought.

    For now, I'll just accept having to change the Flash ROM by unplugging, reprogramming, and replugging it.

  • Memory Map

    Keith11/14/2021 at 17:18 0 comments

    0000 RAM in first 32K less final 256 bytes

    7exx Terbium workspace RAM

    7fxx I/O space:

    XBUS_CS0; ADDR $7F00; SIZE 32
    XBUS_CS1 ADDR $7F20; SIZE 32
    XBUS_CS2 ADDR $7F40; SIZE 32
    XBUS_CS3 ADDR $7F60; SIZE 32

    8000 Start of 32K Flash ROM, start of Terbium IDE. 
    853B End of Terbium IDE (in the particular ROM disassembled)


    Like the BBC Micro, it uses the first 32K for RAM and the last 32K for ROM.

    The BBC Micro  disables three 256-byte pages of ROM space for I/O devices.
    The WD65C02SXB disabled one   256-byte page of RAM space for I/O devices.

    This decoding is done by U6,10,12,13 which are simple to modify logically but not physically, because they are surface-mount TSSOP. I can do it but would probably need to restore it in future. I would also have to mod the IDE software too.

    It is possible to hold TIDE and BBC HiBASIC without overlap, but changing between the two requires reprogramming the hardware vectors in the last six byte of ROM.

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