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Memory Map

A project log for W65C02SXB investigation

Evaluating the W65C02SXB development board

keithKeith 11/14/2021 at 17:180 Comments

0000 RAM in first 32K less final 256 bytes

7exx Terbium workspace RAM

7fxx I/O space:

XBUS_CS0; ADDR $7F00; SIZE 32
XBUS_CS1 ADDR $7F20; SIZE 32
XBUS_CS2 ADDR $7F40; SIZE 32
XBUS_CS3 ADDR $7F60; SIZE 32
USER_ACIA ADDR $7F80; SIZE 4
USER_PIA ADDR $7FA0; SIZE 32
USER_VIA ADDR $7FC0; SIZE 32
SYSTEM_VIA ADDR $7FE0; SIZE 32

8000 Start of 32K Flash ROM, start of Terbium IDE. 
853B End of Terbium IDE (in the particular ROM disassembled)

ABORT ADDR $FFF8; SIZE 2
NMI ADDR $FFFA; SIZE 2
RESET ADDR $FFFC; SIZE 2
IRQ ADDR $FFFE; SIZE 2

Like the BBC Micro, it uses the first 32K for RAM and the last 32K for ROM.

The BBC Micro  disables three 256-byte pages of ROM space for I/O devices.
The WD65C02SXB disabled one   256-byte page of RAM space for I/O devices.

This decoding is done by U6,10,12,13 which are simple to modify logically but not physically, because they are surface-mount TSSOP. I can do it but would probably need to restore it in future. I would also have to mod the IDE software too.

It is possible to hold TIDE and BBC HiBASIC without overlap, but changing between the two requires reprogramming the hardware vectors in the last six byte of ROM.

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