build log 3 - revenge of the part obsolescence

A project log for hexahedron

An open-source minimalist 68030 based VMEbus computer

Jason WesterveltJason Westervelt 12/08/2021 at 17:091 Comment

i am rethinking a few things regarding this project.  i would prefer to use programmable logic, but i would also prefer to avoid using level shifters to deal with the 5V logic on the CPU and other peripherals.  the xilinx situation has been a bit of a fiasco, and i will elaborate here.

to program the CPLDs that i have, i had to build a programmer since the one that i used with rhombus would not work.  i built 3 programmers, one of which was a parallel port design published by xilinx.  none of them worked reliably.  long story short, the newer versions of the xilinx software do not support the revision 0 silicon that i have.  i suspect that the commands are similar, if not identical, however i cannot program the CPLDs.  the CPLD has a different device id and the first 4 bits indicate the revision and are '0' instead of '2', thus the resulting .svf and .xsvf files will not work.  i attempted to modify the .svf, which is human readable, to updated the device id, and this permits the programming to proceed a bit further, but it still fails due to intermittent mismatches coming from the chip.  i triple/quadruple checked my wiring and signaling... it isn't a fault on my end.

turns out, xilinx knows that the xc9500 series has issues in this regard, and they do not recommend using .svf format since it lacks the automatic retry capabilities of the .xsvf format.  the problem is, i cannot modify the .xsvf file to adjust the device id to match.  i COULD put some of my own logic in between the CPLD and the programmer to "inject" the "correct" device identifier in response to the initial query, but i want this project to at least be repeatable by others...

i have an order in for some xilinx CPLDs which have a datecode from 2003 and later.  the CPLD used in rhombus was revision 2 silicon and it was made in 2002.  the CPLDs are rather cheap on ebay with a little searching, but there is no way to know what the date code is, let alone the revision, unless you contact the seller...  if these prove to be viable, i will continue with the HUGE caveat that others wishing to follow along will find that programming these chips to be a daunting task.

an alternative would be to use a lattice part, specifically from the ispMACH 4000ZE or similar.  these have 5V tolerant I/O from what i can see, and the parts are not under obsolescence from what i can see.  i will need to grab a few and try these out as well.


Jason Westervelt wrote 12/08/2021 at 18:21 point

Lattice is out.  They removed their free licence options on the ISE that supports their older products.

Apparently Microchip (Atmel) CPLDs are 5V tolerant.  I have a part coming to me for evaluation purposes.

Will be Saturday or Monday before i get the replacement Xilinx CPLD.

Instead of waiting, once I have some free time from my work commitments, I will throw together a discrete logic version of the VME controller and toss it into the system.  I might just write up my final documentation with "optional" or "alternative" designs so that the project is more accommodating to those wishing to replicate it.

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