in this build session, i rewired the entirety of the computer, primarily to relocate the CPU module and make room for the bus transceivers.  most of the other systems that i have seen are using 74LS645s for the bus transceivers, perhaps because they can sink more current.  from a previous conversation on my rhombus project, it was mentioned that up to 64mA would be needed.  i do not have 74LS645s on hand, however the 74F245s that I have will sink that much, with the caveat that it is the B port, not the A port.  as a consequence, i have the CPU attached to the A side and the bus attached to the B side.  this will require inverting the chip enable logic, but seeing as this will be handled within my CPLD, i suspect that it will not be an issue.

speaking of the CPLD, after obtaining an XC9536XL, my programmer worked just fine.  the only issue here is that i'll need a 3.3V supply for the CPLD's main source, but the I/O is rated to handle 5V.  

video 1: overview of current state

video 2: added the address lines A24-A31 to the bus and added LEDs to visualize the activity