So far, so good. Unfortunately I ran into some issues here, as the circuit proved quite glitchy during spice simulation. A lot of digging revealed that the setup and hold times of the NE555 latches were somewhat unpredicatable due to the slow speed and under some circumstances the register was not updated during a clock cycle. Each register is implemented by a master-slave flip-flop and simply using an normal and inverted clock signal proved to be unreliable.
In the end I managed to fix this by introducing a non-overlapping two phase clock, driving master and slave latch of each register separately. The simulation below shows the functionality of the dice, cycling through all six die patterns. The two clock signals (clk and n_clk) are shown at the bottom