I was made aware of Erics earlier work on NE555 based logic. He actually came up with a pretty neat trick to turn the NE555 into more than just a boring inverter by also using the reset input of the NE555. This results in a logic function based on an AND-gate with one inverted input:

Image taken from Erics article linked above

The naming of this type of gate is debatable, but I call it "ANDN2" in my library. It is actually fairly easy to implement this gate in PCBflow as well. I made a version of the dice where I enforced the AND2 and NOT gate to be the only type of logic gate being used:

   Number of cells:                 19
     ne_ANDN2                       10
     ne_DFF                          3
     ne_NOT                          6

   Chip area for module '\main': 31.000000

Turns out the area is even smaller than withe the Diode/NE555 gates I used before. The reason for that is that no additional space is needed for diodes.

Unfortunately I had a lot of trouble simulating this logic style with spice. So instead of debugging issues with operating point I decided to take the pragmatic way and turn this into a board to test it rather in hardware.  A rendering of the board is shown below. (I miss-spellt the gate type on the silk screen).

=== Component usage ===

Component           Count

pin                 8
NE555               22
cap                 22
npn transistor      6
resistor            18
------------------  -----
Total:              76

This logic style requires a slightly higher count of NE555, 22 instead of 21. Not a bad trade-off, because many diodes are saved.

I should be able to test both versions in about two weeks.