In my newsletter The Mad Ned Memo, I covered the topic of why I wanted to build a nine-bit CPU, so I won't really go too deep into that topic here. But suffice to say, I wanted to try building things with FPGAs, and was looking for a unique project to do. (See the article, I found that to be harder than I thought..)
In the follow-up part 2, we looked a little deeper into the overall design of the QIXOTE-1 CPU. My plans to build something really exotic were tempered a bit by the reality of not really knowing much about CPU design, and needing to follow somewhat conventional norms.
This past week, I published Part 3 of the series - where things start to get real as I struggle with timing issues like memory latency. I think the basic hardware situation is stable now, but I am moving into new areas such as writing a VGA video I/O system that will let the QIXOTE-1 output (low res) video.
Probably any new hardware-related will be put here, and not published in the regular newsletter. I'm taking a break there right now from the nine-bit saga so as not to completely bore readers not interested in the topic. But I will continue to post updates here, including what's going on with the software end of this project.
(Some of that software stuff will eventually make it back to a future edition of the Memo, but if you really want the latest on this project, this is the spot.)