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Hardware Design

A project log for General Purpose Software Defined Transmitter

GPSDTx is a board capable of transmitting a signal up to a few MHz (1-3?) wide anywhere between 100MHz and 2.2GHz

Brett KillionBrett Killion 11/19/2016 at 16:080 Comments

The PDF schematic is uploaded into the files section.

So I wanted to create a transmitter that was driven by a decently powerful microcontroller. I chose the STM32F405 because it can run up to 168 MHz and has an on-board FPU. This should enable it to generate the signals itself rather than functioning only as a data pass-through via USB.

The DAC is driven through parallel lines so DMA should be able to be used to drive the data with maximum speed/minimum processor overhead.

I envision that the 25 MHz TCXO will drive the Si5351A clock generator which can, in turn, give a high speed external 25 MHz clock to the microcontroller, drive the clock input of the modulator with a 40 MHz reference, and then feed an additional clock to an interrupt pin on the microcontroller which can then trigger the data and clock of the DAC. The TCXO should give good frequency stability, accuracy, and phase noise characteristics.

The DAC can take up to 20 MSamp/Sec on each I and Q channel. It does some DSP internally where it upsamples and filters the signal but the important thing is that the Nyquist/Reconstruction filters on the DAC outputs should ideally have a 10 MHz cutoff frequency as that is half of the highest sample rate. The filters also do double duty to turn the current outputs into voltages that the quad mod expects. The current is set by the resistor on FDADJ pin of the DAC. It is set to 10 mA max current. The filter converts the differential current outputs to a voltage output with a DC bias of 0.5 V and a differential voltage swing of 1 Vpp. The filter circuit and simulations from LTSpice are shown below (the simulation results are taken from the common node of L1, C4, and R3. ):

The filter outputs go directly into the differential inputs of the quad mod. The quad mod also takes in a reference clock from the Si5351A and the drives an internal PLL and VCO to generate it's local oscillators.

The nominal output power of the ADRF6755 is around 0 dBm. I wanted a little more and also a sacrificial output stage in the event it got ruined by static or abuse of some sort. I chose the GALI-3+ because it is cheap, wide bandwidth, matched to 50 ohms already, can give around 20 dB of gain. 0 dBm on it's input would saturate the amplifier, however, so there is a 10 dB attenuator before the amplifier. Now the output power should be able to go up to 10 dBm and be wideband matched to 50 ohms on both input and output.

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