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Jumps

A project log for Instruction Set for ECM-16/TTL homebrew cpu

All the instructions laid out in systematic manner

pavelPavel 10/23/2022 at 11:300 Comments

Jump instructions implicitly load Program Counter (first Memory Pointer registers pair) which facilitates changes in program execution flow. There are 2 unconditional jumps (J and JSR), and 8 conditional ones that leads to conditional branching of program flow.

All jump addresses are indirect, they are the current value in Program Counter pair with offsets added.

There are 4 flags setting condition for jump: Carry (C), Overflow (O), Negative (N) and Zero (Z). The 8 conditions are for each flag to be equal 0 or 1. The flags are set by the last ALU operation.

Some additional details about Jump and JSR instruction execution are described in this post.

Other instructions can be investigated here: General layout of instruction types.

Instruction bits meaning:

bits F, E, D, C: opcode for jumps

bits B, A, 9, 8: condition

bits 7..0: top 8 bits of 24-bit offset value

Instruction layouts:

             Instruction words:
             bits of word #1      bits of word #2
Mnemonic:    FEDC BA98 7654 3210  FEDC BA98 7654 3210
J offset     0001 0000 oooo oooo  oooo oooo oooo oooo   unconditional jump
JZ offset    0001 0001 oooo oooo  oooo oooo oooo oooo   jump if Zero
JN offset    0001 0010 oooo oooo  oooo oooo oooo oooo   jump if Negative
JO offset    0001 0100 oooo oooo  oooo oooo oooo oooo   jump if Overflow
JC offset    0001 1000 oooo oooo  oooo oooo oooo oooo   jump if Carry
JNZ offset   0001 1110 oooo oooo  oooo oooo oooo oooo   jump if NOT Zero
JNN offset   0001 1101 oooo oooo  oooo oooo oooo oooo   jump if NOT Negative
JNO offset   0001 1011 oooo oooo  oooo oooo oooo oooo   jump if NOT Overflow
JNC offset   0001 0111 oooo oooo  oooo oooo oooo oooo   jump if NOT Carry
JSR offset   0001 1111 oooo oooo  oooo oooo oooo oooo   jump to Subroutine

o - bits of immediate offset value

All Jumps are PC relative, which makes code position-independent.

The jumps are restricted to no further than +-8388607 bytes from current value of PC.

In the Jump instructions, two words are loaded into PC register pair to yield a new 32-bit address.

Some circuitry is shared between jumps and Address Arithmetic operations on hardware level.

In case the condition is not met, PC is not loaded with new value, and execution proceeds to the next instruction in the program.

Jump to Subroutine:

This is a special type of jump, where PC is stored to memory right before the jump.

1st, store contents of PC to location pointed to by SP,

2nd, update PC with PC + offset value.

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