Starting out with the schematics, I'm recreating boards that should be compatible with existing machines.
Also, I intend to create a new machine with more recent technologies where appropriate, keeping with the original TTL design
- the PCBs for this project are sponsored by PCBWay -
The pins on the ALU are open collector, this does a wired AND, which is incredibly slow (as suspected).
So, what I had needs modified, and this appears to be more appropriate. The R11 / R12 value is debatable though, maybe the classic 1k value would be good enough ?
Well, download the document here for the KB11-C processor boardand start page 1 😎
First board is the M8130 DAP (Data Paths) which contains the 16 bit integer ALU and related multiplexers.
Schematic capture is done.
There is one thing that looks wierd to me in the original schematic, namely, the ALU chips (74S181) A=B ouputs are tied together with a pair of resistors to pull the line up/down, sure looks like a wired or hack...
So I decided to add the possibility to replace this with proper or gates (a 74S02 would add 5.5ns, which I don't think is so much delay that it'd break things)
Same thing happens in the generation of "BUS A=B (15:08) H"
Of course, the board could be populated with more recent parts such as ACT for all functions that currently exist in this family.
I have now started routing the board. about 50% done right now.
there's also https://ecsconn.com/ProductDetails/2400-Series-Card-Edge-Connectors-125-125-Contact-Spacing-Dec-Style-Press-Fit.html however it looks like they are rather expensive.
Very nice boards, where the originals 4 layers ? with so much empty space I'd probably go for 2 layers, at least for experimenting. Are you planning on using shottky parts ? The 11/70 is quite large, I wonder if something like the 11/05, which should be 2 boards, couldn't be a more startup approach (thinking aloud). I assume you have access to a 11/70...
I don't know if the originals were 4 layers. I'm planning on using 74F parts, they are somewhat still available, just about as fast and consume much less than the original 74S
I have no 11/70 available to me, i'm just going by the original schematics (customer print)
Open collector zero after the result was incredibly slow. 74181's A=B when all inverse F's are high on any zero result, not strictly equality. This pin's function was poorly named. You need external AND to merge internal ANDs, rather than NOR as you have drawn. This old ALU could work at least 40% faster by not waiting on those terrible open collectors. Roll your own zero from F pins instead.
@raps500 for the connectors, there are 3 options:
* edac
* sullins
have both something suitable
there's also https://ecsconn.com/ProductDetails/2400-Series-Card-Edge-Connectors-125-125-Contact-Spacing-Dec-Style-Press-Fit.html however it looks like they are rather expensive.