Tens of thousands of people creates they own programs on brainfuck programming language.
Thousands - creates they own brainfuck compilers or emulator to run their creation.
But the only one man tries to create Brainfuck Relay Computer.
BrainfuckPC (BFPC) - is a computer on reed relays, which can execute brainfuck commands natively, without any compilation into other assembly. All main instructions are corresponds to eight bf commands.
Blocks placement. Dimensions 900x600mm
[DRAFT] Assembler instruction set
All instructions are 16-bit wide.
- Bits 15, 14, 13, 12 - define instruction class
- Bit 12 - Signed bit for Adder commands. Value of this bit extended to 13-15 bits when sending to adder input B;
- Bits 11-0 - contain least 12-bit of signed integer. Master 4 bits generates automatically: 0 for positive and 1 for negative values.
|add m12||0X XX||*AP ← *AP + m12||'+' (Repeat m12 times)||Add base to current data value|
|sub m12||1X XX||*AP ← *AP - m12||'-' (Repeat m12 times)||Substract base from current data value|
|ada m12||2X XX||AP ← AP + m12||'>' (Repeat m12 times)||Increase memory address|
|ads m12||3X XX||AP ← AP - m12||'<' (Repeat m12 times)||Decrease memory address|
|jz m12||4X XX||(*AP == 0)? IP ← IP + m12 : IP ← IP||'['||Jump to IP + m12 if current data value is zero|
|jz m12||5X XX||(*AP == 0)? IP ← IP - m12 : IP ← IP||None||Jump to IP - m12 if current data value is zero|
|jnz m12||6X XX||(*AP != 0)? IP ← IP + m12 : IP ← IP||None||Jump to IP + m12 if current data value is not zero|
|jnz m12||7X XX||(*AP != 0)? IP ← IP - m12 : IP ← IP||']'||Jump to IP - m12 if current data value is not zero|
|*AP←*AP XOR m12||None||Logical XOR of current data value with positive constant|
|xor m12||bX XX||*AP ← *AP XOR m12||None||Logical XOR of current data value with negative constant|
|in||c0 00||*AP ← CIN||','||Read one m8 symbol from console. If Cin buffer is empty, wait it|
|out||c0 01||COUT ← *AP||'.'||Write m8 symbol to console|
|clr.ap||d0 01||AP ← 0||None||Clear AP register. Can be combined with other clr commands|
|clr.ip||d0 02||IP ← 0||None||Clear IP register. Can be combined with other clr commands|
|clr.dp||d0 04||*AP ← 0||'[+]' or '[-]'||Clear current data cell. Can be combined with other clr commands|
|set.ap||d0 10||AP ← *AP||None||Write current data value to AP register|
|set.ip||d0 20||IP ← *AP||None||Write current data value to IP register|
|get.ap||d1 00||*AP ← AP||None||Read current data value from AP register|
|get.ip||d2 00||*AP ← IP||None||Read current data value from IP register|
|mode.b8||e1 00||None||8-bit mode activated(1) - default state|
|mode.b16||e2 00||None||16-bit mode activated|
|halt||f0 00||None||halt machine|
- AP - Address pointer Register
- IP - Instruction pointer register
- *AP - Current Data cell
- CIN - Console input
- COUT - console output
- When 8-bit mode activated all arithmetic operations continue to perform in 16-bit mode. But JZ and JNZ branches start depends on only least data byte - (DP & 0x00FF == 0)? and (DP & 0x00FF != 0)? Console Input and Output are always read and write only least byte of 16-bit Word.