How to use the frequency shift array pre calculated by JTDX

A project log for 32MHz spectrum + SDR + FT8 in an FPGA

A 0 - 32MHz FPGA based Software Defined Radio (AM SSB FT8) by ready modules->cheap and easy Last add: Oct 6th FT8 VHDL GFSK modulator

guidoGuido 08/16/2023 at 19:520 Comments

The C code of JTDX is written to create the 81 samples (sampled at 48 KHz - S16LE) of the 8FSK message lasting 12,96 seconds. However, one of its intermediate products is the phase shift (dphi) of the 8FSK modulated signal,  sampled at 48KHz. 

For each FT8 transmission, dphi contains 81*48000*0,16=622.080 samples of the transmitted frequency, for a total last of 12,96 seconds.