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A project log for Jelly

A minimal DIY 8-bit CPU made with TTL chips, to perform native brainfu*k language, extended to use three sequential access tapes.

Alvaro BarcellosAlvaro Barcellos 08/13/2022 at 23:000 Comments


The original idea was to make Jelly using only 7400 NAND chips, but using other 7400 chips, the board becomes very simple to wire and we can evaluate the results faster.

After a few tries, these are the prototype modules.

1) Interpreter, which translate bytes to valid opcodes. Done by a 74hc574 buffer and a mapped eeprom at28c16, results in 0-15 mapped as M4-M7;

2) Pipeline, a clocked counter for pipeline cycles. Done by a 74hc193, results in 0-15 mapped as M0-M3. For now ticks come from a 74hc00 oscillator;

3) Counter, a circuit to read a byte from tape, copy, increment, decrement or clear, and write into tape. Done by two at28c16 and two 74hc574 . Also a comparator with zero with two 74hc32;

4) Control, a circuit  to select which tape, select read from or write into, enable forward, backward or none move. Done by two at28c16 and two 74hc574. 

5) Some extra internal circuits to detect zero, swap tapes and change eeprom pages;

6) Some extra external circuits to emulate tapes.

All in standart universal PCBs fr-4 boards of 100 x 150 mm (connected as 3 x 2, 30x30cm or in a back plane ), with many LEDs colors.

Maybe latter when this proof of concept runs smooth, could make it with NANDs.

PS. I'm still learning to use KICad "on the fly" while waiting pieces from China.

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