Software version

A project log for SPI4C

It's not SPI, I2C or I3C, it's another protocol with full duplex self-clocked links with 2×2 wires that is rich and easy to implement.

yann-guidon-ygdesYann Guidon / YGDES 08/27/2022 at 20:210 Comments

The protocol is easy to implement in logic gates but also equally so in software. This could be life-saving if you must let two CPU or MPU communicate without dedicated interface and with bidirectional messages. This is possible with RS232/asynch serial for example but this is limited to 8-bit streams in practice, so framing is not inherent. MPUs usually implement SPI master features that are exploited. I²C is also rarely a slave device. And asynchronous communications usually require hard real-time constraints.

SPI4C uses more pins but none of them require special hardware, and no hard real-time constraint is required. A CPU or MPU can bit-bang the protocol as a part of an event loop, thus with some jitter but this is not critical.

The protocol is symmetrical so a single code/algorithm works on both peers. The needed resources are :

The algorithm also needs some variables per link :

The status link_ok changes under these conditions :

From there we have 3 entry points :

The higher levels of the interface will then manage simple buffers containing one frame. I didn't handle buffer overflows, by the way. I must even have messed a counter or two but it's pseudocode, you see the intent and you'll have to adapt to your own system.