Colin MaykishAfter double-checking all of my connections and meticulously translating my prototype boards into CAD, I'm ready to start laying out a PCB. I've roughed out the layout, taking care to position the power and rear I/O with the hope of fitting this board into a case eventually. The rest of the board is stubbed out with the approximate position of the components.
The biggest difference between this PCB and my prototype is the larger CPLD. With just the bare minimum prototype hardware, I was using every single available I/O pin on the 44-pin CPLD. I've upgraded to the 84-pin variant. I'll get a bit more breathing room in my hardware design this way plus there's a potential for more hardware expansion/prototyping opportunities.
You can see I've broken out a ton of I/O on the top and right side of the board: PS/2, serial, parallel, and dedicated headers for the LCD and CH386S module. The address/data/control lines will be available on the system bus header, and any unused CPLD I/O will go to its own header as well.
I haven't routed much of this yet. I'm not really looking forward to dealing with the two big PLCC chips in the center, but if I can get that connected cleanly, the rest of the I/O routing should be straightforward.
Here's a messy render of the board as it stands currently:
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The board is looking good. The PLCC parts are not too bad for routing usually and at least with the CPLD you can always re-assign some of the I/O on there to make the routing a little easier
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Thanks! Yea, the PLCC parts were less of an issue than expected - one wide bus from the CPU to the CPLD and all the memory and peripherals coming in to the center. Rearranging the I/O pins to fit definitely helps.
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