100 MSps 2ch oscilloscope based on Raspberry Pi Pico

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This project is a dual channel oscilloscope based on RP2040. It has a 100MSps ADC, a 480*320 IPS TFT and a dual channel 100MHz BW front-end.
The software is based on MicroPython and LVGL and DMA and PIO are used to achive the highest possible througput.

The goal of this project is show the possibilities of the RP2040. It is a new microcontroller from Raspberry Pi based on an Arm Cortex M0+ with a dual-core processor and with a new programmable peripheral named PIO.

Diagram overview

In this diagram we see all the elements of the oscilloscope.

  • The power supply comes from the USB and is regulated independently for the analog and digital parts.
  • Each analog stage is made up of 3 op amps, a gain selector and a DAC for the offset. The selection between AC/DC is done manually by means of a jumper. (Normally this is done with a relay)
  • The acquisition block is composed of the multiplexer, the ADC and the trigger. All controlled by PIO.
  • An I2C bus controls 3 DACs, a TSC and an IO expander (which controls the analog stage).
  • The LCD is also PIO controlled.


In the general scheme we see the power part at the top left, the two input channels at the bottom left and the digital part at the top right.

Power Supply

The power supply takes the 5V from the USB and provides 3 voltages:

  • 3V3 that will be used for all digital electronics.
  • Symmetric 3V3A that will be used for all analog electronics

The integrated LM27762 is a symmetrical regulated source that is capable of generating the negative part using only one capacitor (C2).

CPU block

The main block consists of the ADC, the CPU, and the LCD.

All CPU pins are occupied:

  • 8 pins for the ADC bus.
  • 3 pins for MUX, ADC and TRIG control.
  • 8 pins for the LCD bus.
  • 5 pins for LCD control.
  • 2 pins for an I2C bus.
  • 1 pin for LCD and TSC reset.

Analog front end

The analog input stage is made up of several passives, 3 opamps, a multiplexer and a DAC.
The input impedance is marked by resistors R24+R26, which is 780 KOhm.
The AC filter (set by C27) has a cutoff frequency of 20 Hz.
The gain of this stage is (100/(680+100)) = 0.12. As the supply of the amplifiers is ±3.3V, this gives us a maximum input voltage of ±27V.

The simulation has been carried out with the Texas Instruments software and all the components have a SPICE model. The bandwidth is greater than 100 MHz and the gain remains constant throughout the entire spectrum.

Analog miscellaneous

The reference is implemented with a 2.048V zener connected to an opamp configured as an emitter follower.

The trigger is implemented with an 8-bit DAC and a comparator. The TLV3501 is a high speed comparator, with a delay time of 4nS.

The multiplexer is controlled from the CPU and allows switching from one channel to another. Initially the intention was to do it at 50MHz, but later I verified that these components have a limitation that prevents them from working in this way.

PCB component placing

The components are grouped in clusters with the same functionality and then these clusters are arranged from left to right, starting with analog clusters and ending with digital ones. Also, the power supplies and analog miscellaneous are placed on the upper area of the top layer.
Each cluster is routed on the top layer, connected to the power layers with vias and to other clusters through the bottom layers.

Cluster routing

The analog power supply routing should be as clean as possible. All nets should be as short as possible, specially feedback nets and as wide as possible, specially power nets.
The power input comes from 5V from the upper part and then ±3V3 goes out to the lower part.

Analog PSU routing

The ADC is located between the analog and digital planes. It has the analog part on the left and the digital part on the right.

The analog part is made up of the power pins, the ADC input itself, and the reference. The digital part is made up of the data and control pins.

In the analog part, the routing of the power pins has priority over the signal pins and the latter arrive through the bottom layer.

ADC routing

The front end is the cluster with the most components and is made up of 5 devices. The signal goes from left to right and...

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rpscope v1 and v2 software and hardware files

RAR Archive - 30.52 MB - 10/31/2022 at 21:08


Adobe Portable Document Format - 282.87 kB - 10/31/2022 at 20:41


  • Front end input impedance for high freqs

    jgpeiro11/16/2022 at 21:52 3 comments

    Another situation with which I found doubts was in the design of the filter at the entrance. If I remember correctly, to get a high input impedance, I used a resistive divider, which also increases the input range. The problem is that with this relatively high impedance, at high frequencies, the opamp had a lot of losses.
    To avoid this, I put the capacitor C28, which is driven at high frequencies and allows to drive the input of the opamp. Again I have my doubts about this decision and I wanted to know your opinions. 

    Is it bad architecture? Are there other solutions?

  • Power rail of mixed signal parts

    jgpeiro11/14/2022 at 19:00 2 comments

    Similarly to the division of the power planes, I had some doubts about how to feed the mixed components and after several turns in the final design I see that they were a bit wrong. First of all, I don't have a clear criterion of what to do. I tried that the components with some digital signal were fed from the digital voltage, so as not to introduce noise to the analog one, but maybe that was a mistake, or maybe it is not important, but in any case I would like to clarify it with your help.
    In the image above you can see several mixed components, EACH ONE WITH A DIFFERENT PATTERN! and I think this was a mistake caused by the rush and the desire to close the design and the BOM.

    For example, in the case of the SWITCH, which has positive and negative power, it is clear to me that they have to go to +3v3A and -3v3A, but in one of the cases, U16, it is wrong :-(((
    In the case of the DACs, U11 goes to +3v3A and GNDA, but U18 (which should be the same) and U15 go to +3v3 and GNDA, which I don't like at all. Same for the MUX U2...
    The power did not cause any problem, but it is a bad design decision and above all it reflects a rush to finish.

    Finally, what did cause problems and I had to fix, were the I2C tracks, many of which are inverted. I think I copied the connection order from the PICO and never checked it. Pay the price by having to cut and jumper the tracks on the actual PCB.

  • A better alternative for TMUX1119 is needed

    jgpeiro11/10/2022 at 20:24 2 comments

    Alternative TMUX1119

    Now that the project has gained some audience I have the option of going to the community in search of solutions. So I'll tell you what happens to see if with everyone's help this problem can be unlocked.

    After making the design, playing with the input stages and writing a bit of code, I was ready to test the two channels with the multiplexer. To my surprise he hadn't taken into account a parameter that limited (indirectly) the switching frequency between both channels, and if he couldn't switch fast, he couldn't use both channels at the same time without sacrificing BW or SPS.

    Does anyone know of an alternative with a shorter switching time (t_tran)?

    Preferable in the same package and pinout, but I'm not hopeful... a new PCB is needed anyway to fix other small flaws.


View all 3 project logs

Enjoy this project?



Steven J Greenfield wrote 11/22/2022 at 13:20 point

Perhaps this has been discussed, but if you have 100MHz analog bandwidth front end and 100Msps you are going to have some really nasty aliasing.

Nyquist says no content at or greater than 1/2 of the sampling rate. If you divide the ADC between two channels, that is going to be <25MHz BW required.

Or did I miss something?

  Are you sure? yes | no

jgpeiro wrote 11/22/2022 at 16:19 point

Yes you're right. You can't see a signal higher than 50MHz. My idea is to make the best possible electronics and then limit it with passives.
In any case, the device allows continuous sampling, and in this mode the entire BW of 100MHz is used.

  Are you sure? yes | no

Benjamin wrote 11/11/2022 at 21:03 point

Thank you for the very inspiring project and the detailed description!  I have some suggestions regarding "Does anyone know of an alternative with a shorter switching time (t_tran)?":

Personally I'd prefer a dual ADC approach, such as the AD9288-100, which of course jacks up the total price and complexity ;-).  The ADG719 2:1 MUX boasts <7ns switching with 200 MHz of BW for 5V operation, and will be a simple (maybe pin-for-pin) replacement of the TMUX1119.

Also, I agree with michal777 on not using split GND planes: Separating Digital & Analog GNDs is conceptually good, but hard to implement since the two GNDs are common on multiple parts, so there's no good way of truly isolating them and then tie together at only ONE point :-(. 

Additionally, putting inductors at the supply and outputs of the LM27762 would be highly recommended, to prevent switching transients from showing up in the 'scope display (surprised you haven't seen them yet).  Also using chip ferrite beads (such as Murata BLM15EG121SN1D) on the supply lines for the Pi Pico and other switching components can also help reduce overall noise level.


  Are you sure? yes | no

jgpeiro wrote 11/14/2022 at 18:20 point


Yes, AD9288 is a dual ADC, so can fit much better for this project, but the pico hasnt enought pins, so I tried to use a mux on the analog side.


I think when I designed the board I had some problems with semiconductor shortage so finally choose the TMUX1119. michal777 also sugested the SN74LVC2G53 and looks good to, so I will consider both parts for next version.


Split the planes wasnt easy, specially with these parts that use use analog and digital signals. I never wasnt sure if I need to use 3v3 or 3v3a. I think I used 3v3 if a part has any digital signal, but now Im thinking was a bad decision. In next version I will use 3v3a if the part has any analog signal. Also merge grounds and lets see how it works.


Im not an expert on analog design, so to be careful I prefer to use linear regulators, but as I need negative rail on this design I was forced to use this kind of device. 

In previous projects I used this device without any problem, so I used on the first and second PCB versions of this project. Maybe because the ADC is only 8 bits I cant see any noise on the measurements... Anycase, I will place the ferrites on the next PCB version.

  Are you sure? yes | no

Sean wrote 11/14/2022 at 23:50 point

Is it practical to switch to a serial interface ADC? Something like AD9287. Maybe the RP2040 PIO processor can read and buffer this with a single pin per channel.

  Are you sure? yes | no

michal777 wrote 11/19/2022 at 20:55 point

Why not use 8 channels digital multiplexer on ADC data lines? You could read both channels selecting them with a one additional I/O (e.g. use the one that's used for analog multiplexing, for selection of trigger there's one free signal on I/O expander).

  Are you sure? yes | no

jgpeiro wrote 11/19/2022 at 22:20 point

About option of adding the mux after the ADC that michal777 comments. I think I didnt thought about that, but I dont like add big chips (or many small) to the board. I prefer a mux when the signal is only "one signal". Of course work in digital side will remove lot of problems cause the signal cant be degraded, but for now I prefer to try such analog mux you mention

  Are you sure? yes | no

John Guy wrote 11/07/2022 at 15:23 point

Great job! On the adjustable gain, U9 and U16, the resistors should all connect to IN- of the op amp, and ADG621 switches should connect these resistors to GND. This reduces the parasitic cap on the IN- terminal of the op amp in 2 ways: because the  resistors are small they are easy to place close to the IN-, and also the ON and OFF capacitances of the ADG621 (20pF and 70pF) is isolated a bit by the 47Ω and 100Ω resistances. Also, the LMH6629 is operated at 6.6V total supply, it is absolute maximum 6V. An LT1818 would drop in there, it is rated to 11V total supply, but you would give up some bandwidth.

  Are you sure? yes | no

jgpeiro wrote 11/07/2022 at 17:46 point

Thank you John. 

About the ADG621, you are right, I could have used that connection and I would have had better performance without cost. I had not thought of it.
About the LMH6629, yes I had seen that it was operating out of specifications, but I discovered it shortly before sending the PCB to be manufactured and I decided to take a risk by not waiting any longer. I didn't see any problem so I let it be.
Thanks for the reference LT1818, for future designs I will take it into account.

  Are you sure? yes | no

michal777 wrote 10/31/2022 at 22:22 point

Thanks. I'm asking about ground planes because one solid ground plane seems to be mostly considered a first choice - easier, safer, less likely to cause EMC problems. Separating grounds may be more risky - you've got structure which acts like dipole antenna and longer return paths for signals (better know what you're doing if ground is anything other than a single, solid reference point).

More info - e.g. on youtube:

"What Every PCB Designer Should Know - Return Current Path (with Eric Bogatin)"

"Ground in PCB Layout - Separate or Not Separate? (with Rick Hartley)"

Regarding PCB stackup - according to recommendations of these experts a better choice would be e.g. GND on both internal layers (so that every track has a good return path), then power can be routed together with signals on top/bottom (power plane capacitance is too low to be useful because, I guess, you've got thick dielectric between layer 2 and 3, so just tracks are not much worse than planes). Also, ground on top layer is unlikely to be useful (some people say it may also turn into a bunch of spurious resonators/antennas if it's not well stitched to solid ground by a lot of vias)

Simulating things like EMC with different ground structures may be difficult with free tools or expensive with professional tools. I guess it's rarely done and designer's choices are based on experiences and feedback from EMC testing.

Why are the resistors between amplifier's outputs and -3V3 (e.g. R27, R31)? They seem to be unnecessary.

  Are you sure? yes | no

jgpeiro wrote 11/01/2022 at 07:18 point

Thanks for power-planes and pcb-stackup tips, I will take into account for next designs. Also I need to search a little bit for a free/open-source tool that can simulate such effects on PCB.

Regarding R27 and R31, these resistors try to ensure a minium current out from opamps to avoid crossover distorsion (I dont know if these model can have, so I put in the case they where needed).  I dont want to base all our designs decissions on youtube videos, but we are in 2022 a video explaining it:

  Are you sure? yes | no

michal777 wrote 11/01/2022 at 09:53 point

Thanks for the links.

I tried to simulate one trace on PCB in OpenEMS (compare good and bad ground). Unfortunately I have no experimental data to compare nor any feedback from other users of OpenEMS. OpenEMS is probably the best open source 3D field solver for this task but it's not as easy to use as expensive software.

  Are you sure? yes | no

michal777 wrote 10/31/2022 at 08:37 point


it looks interesting. Are design files available? The schematics are low resolution in the pictures.

Are you sure about splitting ground planes? It's usually deprecated in modern electronics (mostly for EMC reasons).

  Are you sure? yes | no

jgpeiro wrote 10/31/2022 at 21:14 point

Just upload the software and hardware design files (all recursive zips I found on my desktop). Also a schematic in pdf format.

About the planes: No, Im not sure...I write a lot about it here cause these topics are new for me. Maybe in future designs I try without splitting, but what I really need is a way to simulate such things and see the differences between different approaches.

  Are you sure? yes | no

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