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Mnemonics list

A project log for Assembly Language for ECM-16/TTL homebrew CPU

Sub-project where the assembly language is described; the assembler program progress updates are posted here

PavelPavel 11/11/2022 at 19:150 Comments

Here, mnemonics for all instructions are listed, with short descriptions:


ALU instructions (link to machine code description):

All ALU instructions perform operations only on General Purpose Registers

All ALU instructions taking 2 bytes in memory.


instructions updating one of the GPR by const value in range 0..255:

01 - ADDi rA const      -- add const to value in register rA, save result to same register rA

02 - SUBi rA const       -- subtract const from value in register rA, save result to same register rA 

03 - XORi rA const       -- bitwise XOR const with value in register rA, save result to same register rA

04 - XNORi rA const    -- bitwise XOR inverted const with value in register rA, save result to same register rA

05 - ORi rA const         -- bitwise OR const with value in register rA, save result to same register rA

06 - ORNi rA const       -- bitwise OR inverted const with value in register rA, save result to same register rA

07 - ANDi rA const       -- bitwise AND const with value in register rA, save result to same register rA

08 - ANDNi rA const    -- bitwise AND inverted const with value in register rA, save result to same register rA


3-operand Arithmetic instructions

09 - ADD rY rA rB     -- add value in register rB to value in register rA, and save it to register rY

10 - SUB rY rA rB      -- subtract value in register rB from value in register rA, and save it to register rY

11 - ADDC rY rA rB    -- add value in register rB to value in register rA, with carry, and save it to register rY

12 - SUBC rY rA rB    -- subtract value in register rB to value in register rA, with borrow, and save it to register rY


3-operand Logic instructions

13 - XOR rY rA rB      -- bitwise XOR value in register rB with value in register rA, and save it to register rY

14 - XORN rY rA rB    -- bitwise XOR inverted value in register rB with value in register rA, and save it to register rY

15 - OR rY rA rB         -- bitwise OR value in register rB with value in register rA, and save it to register rY

16 - ORN rY rA rB       -- bitwise OR inverted value in register rB with value in register rA, and save it to register rY

17 - AND rY rA rB       -- bitwise AND value in register rB with value in register rA, and save it to register rY

18 - ANDN rY rA rB   -- bitwise AND inverted value in register rB with value in register rA, and save it to register rY


1-bit shift operations

19 - SHL rA rB     -- shift value in register rB 1 bit left, save result to register rA

20 - SHR rA rB     -- shift value in register rB 1 bit right, save result to register rA

21 - ROLC rA rB   -- rotate value in register rB through carry 1 bit left, save result to register rA

22 - RORC rA rB  -- rotate value in register rB  through carry 1 bit right, save result to register rA

23 - ASHL rA rB   -- arithmetic shift left value in register rB , same as regular shift, save result to register rA

24 - ASHR rA rB   -- arithmetic shift right value in register rB, while preserving msb, save result to register rA


Rotations

25 - ROTi rY rA 0xF  -- rotate value in register rA 0xF (0-16) bits left, save result to register rY

26 - ROT rY rA rB    -- rotate value in register rA left by number of bits by value in register rB, save result to register rY


Invert

27 - INV rA rB   -- flip bits in value in register rB and store result into register rA


Byte Sign Extend

28 - BSE rA rB -- copy bit 7 into bits 8..15 of the value in register rB and store result into register rA


Comparisons

29 - CMP rA rB      -- Regular comparison, subtract value in register rB from value in register rA, and discard the result (only status flags are updated)

30 - CMN rA rB       -- Compare Negative, add value in register rB to value in register rA, and discard the result (only status flags are updated)

31 - TST rA rB        -- Test Bits, perform bitwise AND between rA and rB values, and discard the result (only status flags are updated)

32 - TEQ rA rB       -- Test Equality, perform bitwise XOR between rA and rB values, and discard the result (only status flags are updated)

33 - TCM rA rB      -- Test Complement, perform bitwise XNOR between rA and rB values, and discard the result (only status flags are updated)

34 - TIB rA rB        -- Test Inverted Bits, perform bitwise ANDN between rA and rB values, and discard the result (only status flags are updated)


Address Arithmetic instructions (link to machine code description):

35 - ADDpi MP const  -- add signed const in range -8388608..+8388607 (24-bit signed value) to address in memory pointer pair MP and store result into the same pair

36 - ADDp MP rX         -- add signed value from register rX to address in memory pointer pair MP and store result into the same pair


Move instructions (link to machine code description):

The source and destination can be any of 8 GPR registers, any of 8 memory pointer registers, and any special registers in any combination except moves between two special registers and all moves from IVB -- it cannot be copied, result is undefined.

All MOV instructions taking 2 bytes in memory.

37 - MOV rA rB   -- copy value stored in register rB into register rA. 

38 - MOVs rA srB  -- copy value stored in register srB into register rA. 


Immediate Loads (link to machine code description):

All Immediate Load instructions take up 4 bytes words in memory.

39 - LDir rX 0xFFFF -- load constant in range 0..65535 into General Purpose Register rX

40 - LDim MP 0x01FFFFFF -- load constant in range 0..33554431 into Memory Pointer Pair MP. At load, the bit 25 is extended to bits 26..31, thus the address space accessible is in two ranges: 0x0000_0000..0x00FF_FFFF and 0xFF00_0000..0xFFFF_FFFF.


Direct Load and Store (link to machine code description):

The source and destination register rX can be any of 8 GPR registers and any of 8 memory pointer registers.

Direct Load and Store instructions take up 4 bytes in memory.

41 - LDd rX 0x01FFFFFF     -- load 16-bit value into register rX from memory by address in ranges 0x0000_0000..0x00FF_FFFF and 0xFF00_0000..0xFFFF_FFFF.

42 - STd rX 0x01FFFFFF     -- store 16-bit value from register rX into memory by address in ranges 0x0000_0000..0x00FF_FFFF and 0xFF00_0000..0xFFFF_FFFF.


Indirect Loads and Stores (link to machine code description):

The source or destination register rY can be any of 8 GPR registers and any of 8 memory pointer registers.

The base address (MP) is in one of the Memory Pointer Pairs (MP).

Offset can be a) explicit value or b) value in one of the General Purpose Registers rX; offset is signed 16-bit value (range -32768..+32767).


Load and Store with no offset:

These instructions take up 2 bytes in memory.

43 - LD rY MP                       -- load 16-bit value into register rX from memory by address in MP

44 - ST rY MP                       -- store 16-bit value into register rX from memory by address in MP


Load and Store with explicit offset:

These instructions take up 4 bytes in memory.

45 - LDo rY MP 0xFFFF       -- load 16-bit value into register rY from memory by address offset from MP by explicit value

46 - STo rY MP 0xFFFF       -- store 16-bit value from register rY into memory by address offset from MP by explicit value


With post-increment:

47 - LDoa rY MP 0xFFFF     -- load 16-bit value into register rY from memory by address offset in MP, then add explicit value to MP and store result in MPWith pre-increment

48 - SToa rY MP 0xFFFF     -- store 16-bit value into register rY from memory by address offset in MP, then add explicit value to MP and store result in MP


With pre-increment

49 - LDob rY MP 0xFFFF    -- load 16-bit value into register rY from memory by address offset from MP by explicit value, store new address in MP

50 - STob rY MP 0xFFFF    -- store 16-bit value into register rY from memory by address offset from MP by explicit value, store new address in MP


Load and Store with offset in register:

These instructions take up 2 bytes in memory.

51 - LDr rY MP rX                -- load 16-bit value into register rY from memory by address offset from MP by value in rX

52 - STr rY MP rX                -- store 16-bit value from register rY into memory by address offset from MP by value in rX


With post-increment:

53 - LDra rY MP rX              -- load 16-bit value into register rY from memory by address offset in MP, then add value in rX to MP and store result in MP

54 - STra rY MP rX              -- store 16-bit value into register rY from memory by address offset in MP, then add value in rX to MP and store result in MP


With pre-increment

55 - LDrb rY  MP rX              -- load 16-bit value into register rY from memory by address offset from MP by value in rX, store new address in MP

56 - STrb rY MP rX              -- store 16-bit value into register rY from memory by address offset from MP by value in rX, store new address in MP


Jump instructions (link to machine code description):

Jumps are instructions that update the first Memory Pointer Register pair (Program Counter). The new value is calculated somewhat like in Address Arithmetic instructions, the difference being that PC is implicit destination, while the base address can be in any of 4 Memory Pointer Pairs, and the calculation is conditional (for conditional jumps). If base address is in PC, jumps become PC-relative, and thus code is position-independent.

The offset values are 16-bit signed values, in can be from one of General Purpose Registers or from explicit immediate value.

All Jump instructions take up 4 bytes in memory.

57 - J 0xFFFFFF         --  unconditionally load PC with sum of value in MP register pair and signed 24-bit value

58 - JZ 0xFFFFFF      --  if Zero flag is "1" load PC with sum of value in MP register pair and signed 24-bit value

59 - JN 0xFFFFFF     --  if Negative flag is "1" load PC with sum of value in MP register pair and signed 24-bit value

60 - JO 0xFFFFFF     --  if Overflow flag is "1" load PC with sum of value in MP register pair and signed 24-bit value

61 - JC 0xFFFFFF     --  if Carry flag is "1" load PC with sum of value in MP register pair and signed 24-bit value

62 - JNZ 0xFFFFFF   --  if Zero flag is "0" load PC with sum of value in MP register pair and signed 24-bit value

63 - JNN 0xFFFFFF   --  if Negative flag is "0" load PC with sum of value in MP register pair and signed 24-bit value

64 - JNO 0xFFFFFF   --  if Overflow flag is "0" load PC with sum of value in MP register pair and signed 24-bit value

65 - JNC 0xFFFFFF   --  if Carry flag is "0" load PC with sum of value in MP register pair and signed 24-bit value

66 - JSR 0xFFFFFF    --  unconditionally store current value of PC to memory at address in SP - 4, then load PC with sum of current PC value and signed 24-bit value


Miscellaneous instructions (link to machine code description):

These are assorted service-type instructions outside of above categorization

All these instructions take up 2 bytes in memory.

67 - SETIM M   -- Set interrupt mask, M is number in range 0..7

68 - CLRIM M  -- Clear interrupt mask, M is number in range 0..7

69 - SETPR P   -- Set prefix, P is number in range 0..7

70 - EINT I        -- Enter interrupt service routine, I is number in range 0..255

71 - DMA         -- Direct memory access - set address selector to '0b11', stop propagation of clock signal into processor

72 - RESET      -- software cpu reset - clear all registers

73 - HLT           -- halt execution - stop propagation of clock signal into processor

74 - NOP          -- empty operation, advance PC by 2 bytes.

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