Among 19 programmer-visible registers there are two main groups of 8 each and 3 special registers scattered around the CPU:
1) General Purpose Registers: 8 16-bit registers that are accessible to main ALU.
These registers are named r0, r1, r2, r3, r4, r5, r6 and r7.
2) Memory Pointer Registers: 8 16-bit registers combined in 4 pairs to hold 32-bit values. The registers are also accessible individually for data transfer.
PC -- Program Counter, updated each time new instruction is fetched
SP -- Stack Pointer, provides address for storing current PC value when executing JSR instruction
FP -- Frame Pointer, can be used as additional pointer to manage program stack
BP -- Base Pointer, can be used as additional pointer, for example, to some data structure in memory, like object or array.
Individual Memory Pointer register (16-bit) names:
mp0, or PCH -- high word of PC pair
mp1, or PCL -- low word of PC pair
mp2, or SPH -- high word of SP pair
mp3, or SPL -- low word of SP pair
mp4, or FPH -- high word of FP pair
mp5, or FPL -- low word of FP pair
mp6, or BPH -- high word of BP pair
mp7, or BPL -- low word of BP pair
3) Status Register
SR -- this register is only 4-bits, it contains flags indicating ALU operation output characteristics, such as if there is a carry generated, or oveflow, or the resulting value is negative or zero.
It can have its value moved into or from one of GPR or MPR with special MOV operation.
4) Memory Data Buffer
MDB -- 16-bit register -- written to automatically whenever F2 state is active by the value of second word of 2-word instruction.
It can also be written to or read from to GPR or MPR manually with special MOV operation.
5) Interrupt Vector Base
IVB -- 16-bit register, used to provide the base address for an array of Interrupt Service Routines, is a high word of 32-bit address.
Can also be written to or read from to GPR or MPR with special MOV operation. The write is used for initial setup of system.