Hello community! I'm thrilled to share a huge achievement: after a intense, three-week-long push, I have successfully completed the development and debugging of the video controller for Alesta LX. This was the most complex and large-scale stage of the project so far, filled with challenges and unexpected turns. But the result was worth every moment!

Below is a detailed breakdown of what was accomplished and the effort it required.

What Was Done: A Chronicle of Challenges and Triumphs

1. UART Bridge and Wishbone Bus
   • Task: Establish a stable serial interface for accessing the Wishbone system bus.
   • Problems: A full 4 days were spent on debugging! The issues were numerous:
     • Unstable operation of WSL with hardware COM ports.
     • Internal synchronization issues in the transmitter and receiver, which had to be completely redesigned.
   • Outcome: The protocol was significantly simplified, and some initially planned features were abandoned for the sake of stability.
2. SDRAM Controller
   • Task: Enable operation with RAM.
   • Solution: The initial implementation had to be scrapped and rewritten from scratch based on a different open-source project to achieve reliability.
3. Memory Arbiter
   • Task: Manage memory access for multiple devices (system bus, video controller, future coprocessor).
   • Problems: Many "hidden pitfalls" were discovered.
   • Key Solution: All memory accesses now use a burst mode, which loads 32 bits of data at once, significantly improving efficiency.
4. Video Controller's System Arbiter
   • Task: Manage the flow of data and addresses within the video controller itself.
   • Outcome: Although this arbiter is simpler, several iterative changes were still required to make it work perfectly.
5. CRT Controller (CRTC)
   • Task: Implement the "heart" of the video output.
   • Work Done: Significant effort was invested in refining the control registers, adding burst mode support, and fine-tuning signal generation for various video standards.
6. Video Buffer and Pixel Generator
   • Video Buffer: Despite its seeming simplicity, this device proved to be quite tricky and required deep research and refinement.
   • Pixel Generator: Converts a byte stream from memory into a stream of pixels. It was less demanding but still a non-trivial task.

Tools and Software

To debug the palettes and video modes, I had to create a suite of Python utilities:

• An image converter to the proprietary .PIX format understood by the platform.
• An image loader to write directly to video memory.
• Utilities for working with the palette and video controller registers.
• A patcher to apply on-the-fly changes to memory and devices for switching video modes.

Video Controller Capabilities: The Final Result

And here is the result! The video controller isn't just working; it's magnificent.

• Modes: It supports not only Amstrad CPC modes but also a range of linear modes with a simpler memory structure.
  • Available color depths: 1, 2, 4, and 8 bits per pixel.
  • Maximum image size up to 64 KB.
• Palettes: A wide selection of palettes is supported!
  • Original CPC colors
  • 12-bit RGB (4096 colors)
  • MSX2+ RGB colors
  • MSX2+ YJK colors

Proof in a Picture: Attached to this post is the first image displayed on real hardware: 320x200 pixels, 256 colors from a palette of 4096.

What's Next?

The era of the video controller is complete. The next grand stage is connecting the central processor (Z80) to the system and running actual software on it.

Thank you for being with me on this journey! Your support is incredibly important.