This project almost didn't get off the ground at all. I've built Z80 systems from scratch, but the Z80 is a dead-easy CPU to make go. The i8008, on the other hand, is not easy at all. It is really about three quarters of a CPU with the rest up to you. It doesn't even have an address bus. What it does have is an 8-bit "everything but the kitchen sink" bus that carries address-high, address-low, control bit, and data. Then it's up to you, the hardware designer, to sort this out into a real address bus based on various status bits. I dabble in hardware but I'm fundamentally a software guy. If I had had to figure out how to make the 8008 go by myself from scratch it probably would have ended there.

Fortunately, as I was looking at starting this project, I came across this web site where Len Bayles had, pretty much as an intellectual exercise, built a time-of-day clock based on an i8008 chip. And even better there was lots of documentation and schematics. His system had significant difference from what I wanted. He had switches so you could toggle data into memory and inspect memory - the original MCM rack machine didn't have that so I don't need it. His machine didn't have the ability to single step instructions, something I want to have. But the guts of his design, looking after all the weirdness to make the i8008 go, was enough to get me off the ground.

He used 74LS whereas I want to use 74HC, and one of the chips he used is no longer available. So there was a certain amount of mutatis mutandis but it was enough of a jump start to get me going. 

The 8008-1 requires a 2-phase 800 kHZ clock. The schematic of the current clock circuit is shown here (PDF). I will probably modify this. It's using a 6.4 MHz crystal because I couldn't find any 3.2 MHz or 1.6 MHz crystals at DigiKey. But they do have 3.2786 MHz crystals which I will probably try. I would also prefer to eliminate the one-shots. This was, of course, the very first circuit built for the project and before there was any certainty that the project would go to completion.

The schematic for the CPU section is here (pdf). Clearly much of it is based on Len Bayles clock but with some changes. In the upper left is the circuit that mediates single stepping. The 8008 doesn't really have a single-step feature. What it does have is a READY input that slow memory (the very thought of a memory slower than this 800 kHz processor is somewhat mind boggling, but apparently such things did exist) can set False until the memory is ready, The 8008 marks time until READY is true, and there is no time limit on this. Thus we use the READY line to effect single-stepping, although this has some ramifications for the LEDs that display the address and data lines. Top, center, there is a 74HC574 which can gate one of eight possible instructions onto the data bus at reset time. In Len Bayles clock this was handled by the front panel switches. But Rack8 has no front panel switches, so this function got  moved to the CPU. The jumpers at J1 allow any of the 8 "reset" instructions to be used. Once the CPU is up and working it would always be reset-0 but during testing and debugging it is handy to be able to run up to eight different tests.