• Project Log 09122023

    TRAN.VINH.QUANG • 12/09/2023 at 07:53 • 0 comments

    I keep designing and checking errors, there are too much traces need to finish. Here is an inside of module when I checked vias and holes.

  • Project log-21102023

    TRAN.VINH.QUANG • 10/26/2023 at 15:39 • 0 comments

    I AM DESIGNING TO VISUALIZE THE FINAL 32 NODES VERSION.

     I CHOSE THE BGA CHIP TO BE THE MAIN MONITORING CHIP AND THE NODES ARE DESIGNED TO BE LOCATED ON THE EDGE OF THE CIRCUIT BOARD.


    THIS WAY HELPS ME EASY TO CHECK AND CONNECT WITH OTHER PARTS.
    TO INCREASE STABILITY, I HAD TO DESIGN AN ADDITIONAL PROTECTIVE SHIELD FOR THE CIRCUIT. ON BOTH SIDES.


    IT IS A SHIELD MADE BY CNC MACHINE, SO I DESIGNED THE NECESSARY PARAMETERS FOR PROCESSING THIS SHIELD.

  • Project Log-31072023

    TRAN.VINH.QUANG • 07/31/2023 at 12:09 • 0 comments

    For full one node minium variable testing, I tried to make a high density components pcb, microvias and via in pad too expensive so I will change layout a bit. Use some pattern for high speed design, I hope EMI will not make my chip run fail. 

  • Project Log - 17062023

    TRAN.VINH.QUANG • 06/22/2023 at 03:32 • 0 comments

    Since my first test board milling with my do-it-yourself cnc I have not had the resolution I wanted, there is a backlash problem that makes the chip with 0.1-0.2 mm spacing not suitable fit. This is really important during prototyping, because I want to prototype with my own machine, I have to fix it to the target resolution.
    Continue to update...

  • Project log-01042023

    TRAN.VINH.QUANG • 04/01/2023 at 09:54 • 0 comments

    To make the prototype, I built my own cnc machine. 1U means size 10cm x 10cm. With the chip I used, in the project log before, I only checked 8 nodes, it still has room for 32 nodes so I changed the schematic of the supervisor, also changed the node communication controller chip  and I2C isolation. It took quite a bit of my time, as I had to check the datasheets and figure out how to wire them up.

    In this video, the functional area is divided into several parts and created with a cnc machine for testing. 

    I hope I finish the first full test board in the next project log.

  • Project log-25022023

    TRAN.VINH.QUANG • 02/26/2023 at 04:01 • 0 comments

    Project conducted a split study of 19 schematic diagrams with the new chip. Two feature principle schematics, one supervisor schematic, sixteen nodes schematics.
    Continue to update...

  • Project log-08012023

    TRAN.VINH.QUANG • 02/26/2023 at 04:00 • 0 comments

    Node number 8. The project conducts the design of gcode to process prototypes. The gcode file will be inserted into the machine to create the circuit template. Each machine will need its own design parameter, so this gcode file is calibrated according to that parameter, to ensure feasible machining.

  • Project log -17122022

    TRAN.VINH.QUANG • 02/26/2023 at 03:59 • 0 comments

    The project continues to design the UART part for the monitoring module, each chip has 16 channels, corresponding to the design that can be connected to 16 nodes, the design of the schematic diagram of node 8 done, the connections to the Nifgo development board are done.
    The next work will start to design the trace for actual testing.

  • Project log-29102022

    TRAN.VINH.QUANG • 02/26/2023 at 03:57 • 0 comments

    The project conducts the design of the I2C isolation circuit, power management for the microprocessor module, has a total of 8 microprocessor modules with 1 total processor for monitoring, the project is expected to design 8 modules to perform the task. Explore different stats in outer space including radioactivity, light indicators, humidity, acceleration...

    These sensors are limited in supply, some have to be self-made from components, but within their capabilities, the project will try to integrate as much as possible.
    This satellite version uses a new chip compared to previous similar satellite projects and uses the new technology of the Nifgo development board to research and create MVP,
    Separate feature test versions will be built first, hybrid versions executed later to complete the task.

  • Project log-10092022

    TRAN.VINH.QUANG • 02/26/2023 at 03:55 • 0 comments

    Project has fabricated the upper frame, lower frame and wall of the artificial satellite. Research samples were also brought to the event to share with attendees.

    Today's event is scheduled to take place from 9am to 10am, but the content discussed continuously will not end until 11:50 am.
    Follow-up sessions will be scheduled monthly at various public locations throughout the city to make it easy for participants to attend.