Isetta TTL computer

Here is an impression of the new PCB (Image generated by KiCad). It's almost finished.

And here is a small section (of four IC's) :

The TOP layer is RED, first inner layer is groundplane (not shown), second inner layer is ORANGE and the BOTTOM layer is BLUE. You can click on the picture for a better view.

Yes, all routed by hand.

The Isetta made it to the front page !

The Computer We All Wish We’d Had In The 8-Bit Era by Jenny List.

We take all kind of pills
That give us all kind of thrills
But only one thrill is gonna stay 
Thats the thrill that you'll get when you find your project
On the cover of the hack a day

(Hack a Day) Wanna see my project on the cover
(Day) Made a big printout just for my mother (yeah)
(Day) Wanna see my smilin' face
When my project is on Hack a Day

Thank you, Jenny !

Understand a little Dutch ? We've got you covered. There is a nice cover of the cover....

Luckily, the first prototype worked without real problems. The only obvious one being the strange footprint for the VGA connector. 

But for my next pcb run, I want to do several changes:

 - fix mistakes (VGA connector)
 - add Mouse connector
 - add HW for sending info to keyboard (and mouse)
 - add memory bank select
 - change video pixel/color generation
 - change WiFi module type
 - simple 4-wire connect to Raspberry Pi (file transfer)

BANKSWITCHING

The memory bank selection is, I think, the most complicated of this new features. The new system will have the following modes: Register, Table/ZPage, Native, Application, Kernel slot1, and Kernel slot3. You can see that in the following table:

In the current hardware, only the Register mode, Table/ZPage and Native mode are present. The register mode allows access to 64 fixed locations in memory (a kind of zero-page addressing). There is another group of 64 locations that can be switched (for Z80 registerbank switching). Table/ZPage mode is used with an identity (1:1) table to access DPL and PCL, to access the Shift-right table, and for the 6502 to address ZPage values. The Native mode allows addressing the full 512 Kbyte of memory, but it's problem is, that the used 64K bank (yellow fields) is hard programmed in the microcode.

This will now be more flexible. In the new Application mode, one of the 8 selectable 64K banks can be programmed in a bank select register (blue fields). The selected bank will be valid for data as well as program code. Note that the microcode can force that Native mode or Register mode is used, by using the control bits CTL_M1 or CTL_REG2.

An operating system must be able to access all memory, to be able to load programs and move data around. I want to adhere to a common practice in several Z80 systems, where the memory space is divided in slots of 16Kbyte. To make this not too complicated, only 2 of these 16Kbyte slots can be mapped to another 64k memory bank.

So, the Kernel_slot1 mode allows you to map any of the 32 blocks of 16kByte into slot 1 . Eight banks of 64K can be chosen with the blue BS signals, while within such a 64K bank, a 16K block can be chosen with the orange BLK signals. Slot0, 2 and 3 will select the 64K bank that is defined in the microcode instruction (with the yellow BNK signals).

The Kernel_slot3 mode allows you to map another block in slot3. But this has a few restrictions. The mapped-in block can be any 64K bank, but within that bank it is always block3. And no code can be executed from the mapped-in block.

In the table, the bits indicated in RED show which bits are needed to select a certain mode. For the bank select register, there are only 3 types: Application/Native, Kernel_slot1 and Kernel_slot3.

VIDEO CHANGE

In the current video system, in the 640-pixel mode, a byte from memory represents 8 pixels, and the byte tells for each pixel if it has foreground color or background color.

But this system was designed when the processor/memory cycle was still 160nS.

Now that I changed the cycle time to 80 nS some time ago, a fetched byte only needs to provide color for two pixels (pixels last 40nS). So we can simply have 4 bits (16 colors) per pixel ! Now each pixel can have an independent color.  This seems much more flexible than the previous system, so I'm gonna change that. 

VGA connector footprint issue

It turnes out that all KiCad footprints for these DSUB-15HD connectors are wrong, and that was known already 5 years ago, see this issue report. Swiching to the newest 8.0 version still had the wrong footprint. So I had to edit the footprint myself.

After a little while, I got the Manic Miner fully working, including sound:

But in the video signal, there are two annoying stripes at the right side of the screen (also going through the score). This is related to a end-of-line flag that is tested there in the microcode that builds the screen. The exact reason is not known yet. [ edit: the reason was found, and the bug removed.]

SOUND

The sound took a little fiddling to get it to work properly. The ZX Spectrum has a very simple sound system, similar to that of the Apple II. It is a single bit of an output port (port 0xFE), that is amplified with a single transistor, and connected to a small speaker. The program has loops that toggle that bit with a certain timing.

The Z80 of the Spectrum runs at 3.5 MHz. Isetta runs at 12.5 MHz. But Isetta spends around 73% of her time rendering the Spectrum screen, so her effective speed is about 3.375 MHz. A Spectrum program, generating a constant tone, would come out as a series of high-frequency 'chirps' during blanking time.

The write to the 0xFE output port is handled by microcode. It now stores the value instead of writing it to the speaker. At every line interrupt, this value is put in a buffer (only during blanking time when the Z80 code runs, that is about 140 lines per frame ). But in every line interrupt (525 times per frame), a value is read from the buffer and written to the sound output. The same value is used four times, and then the buffer pointer is incremented. So the sound is stretched by a factor 4.

It had another problem. The sound bit is normally zero, then it toggles during the tone, and then is zero again. This means that it has a low-frequency component. In the ZX with its tiny speaker this was probably no problem, but in my case I have a set of amplified PC-speakers (with 3.5 mm jack connector) that have a 'good' bass response. So the little 'music' tones were accompanied by loud plop sounds.

The sound system of Isetta has 8-bit samples. I defined a level that was halfway the 0 and 1 of the speaker signal. So normally the signal was at 50%. When port 0xFE was written, the signal would be 0% or 100 %. But the point is, it is difficult to know when the tone stops, so you don't know when to go back to 50% . I did this as follows. At each interrupt, when the 0xEF port was not written, I bring the speaker signal a few steps closer to 50%. So when the tone stops, the signal will go to 50% quite soon. This gave a reasonable sound quality.

KEYBOARD

I already had Z80 code to convert the PS/2 keyboard to ASCII, and to convert ASCII to the codes for the ZX Spectrum keyboard matrix. But for playing a game, I also had to use the PS/2 'key released' messages, to tell the game program exactly when a key was released. 

THE GREAT ESCAPE

I tried another program. The Great Escape. This program also has a very good, commented disassembly. 

In this program, a prisoner of war has to escape from a prisoners camp. It is totally different from the previous game.

The display is a semi-3D rendering. It is almost a modern game, where a camera follows the hero on the terrain and in the several buildings.

It did not take much time before I saw the first guards walking on the screen. But it was only a few second, then the program crashed. What could it be ? I looked through the source and I found it used an instruction that I had not implemented, because my thought had been, who is ever going to use that ??  RRD  Rotate Right Digit

But the game uses it to shift the whole screen four pixels to the left or the right....

So the RRD and RLD are now also in the microcode.

Program worked. But I have no clue how to escape...

[ edit: What David Thomas says about the great escape ]

TEXT MODE

In the last log I mentioned that there was video output.

A 80-column text mode was created. Each character is in a 8 x 8 pixel matrix. To make it better readable, a few empty scanlines are between the textlines. The VGA pixels are generated by the microcode.

At the moment this is mainly used as a text mode, although it is actually a graphic mode with 8 bytes of 8 pixels each. For each row of a 'character', there is also a color byte. The idea is that every character can have a different color (but since this is a graphic mode, each row of a character could have it's own color). The background color for a character can also change, but that's not fully implemented yet.

The picture shows how the system starts in the current version. It shows a few big colored fields to show some of the colors. At the right side you see some random colors, where you can see that each character can have a different color for each row.

You also see how the file directory shows up. A line that starts with "D" means that this is a directory.

After I got this video mode working, I worked on the PS/2 keyboard input. The keyboard did only give a singe message after startup, always the same, and did not respond to key presses. After searching my keyboard on the internet, I found that some keyboards need a RESET message before they start working. In my case, I had to solder two transistors on the pcb to be able to transmit the reset message to the keyboard. But then it worked ! A Z80 program translates the scancodes to ASCII. 

Isetta can now run with its own keyboard, video output and file system, without the need for the RPi !

ZX Spectrum video system

After I got that working, I spend some time making a video mode that behaves as ZX Spectrum graphics .

To test this, I downloaded the source of the game Manic Miner. I could only get this to work if I also found the explanation of Manic Miner source code. Here is the first result:

Obviously, not everything was working correctly yet. There were vertical lines at every character boundary, and apparently the attribute bytes of the lower part of the screen were not correct.

It could be traced (within reasonable time) to a failing LDIR (load-increment-repeat) instruction. This is used in the game to copy big blocks of bytes to the screen, with a single instruction. The LDIR, that is implemented in microcode, was designed to check for an interrupt periodically, and in the case of interrupt set the program counter two steps back, and after the interrupt resume the copy operation. But it didn't work correctly with interrupts.

The LDIR was a highly optimized piece of microcode. At ten cycles per transferred byte, it loaded the byte, stored it at the destination, incremented the HL source address (with carry between low and high byte), do the same for the DE destination address, decrement the BC byte counter, test if BC is zero. And also check the interrupt signal at every transferred byte.

I took the fast way out. I grabbed a RST instruction (0x20) and did put a copy routine there. In the source of the Manic Miner, I replaced every LDIR with a RST 0x20. Followed by a NOP to leave addresses unchanged. Getting the bug out of the LDIR instruction was put on the TODO list. Now I got this:

Already much better !

I could also see on the piano keys that the start-up tune was playing (but of course I have no sound yet). Also, a scrolling message was visible. After that, the program crashed. More debugging to do !

A true milestone today !  Just half an hour ago...

The picture shows my test setup, with a laptop, scope, Raspberry-Pi screen, and....

FIRST VIDEO OUTPUT !

It shows just a simple testpattern that I quickly made up. Colored bars and pixel patterns, and when I wrote it I had no idea how it would look. I did not bother to start the pixels at the correct distance from the sync pulse, so apparently I started much too soon since a the right-side, one-third of the screen is empty. (but I also just generated 60 characters instead of 80, to have simpler code).

The picture gets its stability from the timer interrupt on Isetta. The picture stays fully stable if I give Isetta commands via the Raspberry Pi screen. On the Isetta, there is no need for forcing your code in certain blocks with exact equal amount of cycles as in some other designs. (but of course, the interrupt code that generates the picture must have exact timing).

You can see on the picture that the video connector connects with wires to the pcb. That's because I used the wrong footprint for the 15 pin video connector. I had no idea that there were different types. The difference seems to be that one has a row distance of 2 mm and the other one a distance of 2.5 (or 2.54) mm.

Soon there will be characters on the screen !

FILE SYSTEM

Isetta has a 32MByte serial flash, and it is there because I want her to have a file system.

While making this file system, I also make a simple command shell, at first just for testing the file system functions but it will grow to get every command that is needed.

The serial flash is a W25Q256JV device. It has 8,192 erasable sectors of 4kByte each.

It would be cool to have a little wear-leveling. That almost rules out a FAT system, where an allocation table is written to the same sector, each time as one of the files changes (unless you write it on a different position each time).

What did I come up with ? The system has the following properties:
 - files (that consist of one or more sectors)
 - hierarchical directory structure
 - deleted or overwritten files stay available (but are normally not visible in the directory), until erased (after adjustable time).
 - supports hidden files

FILE STRUCTURE

The first sector of a file (or directory) has this structure:
At 0x0000:
 - (byte) flags
 - (word) sector of the directory that it belongs to
 - (byte) lsb of the properties address
 - (byte) hash of the name
 - (byte sequence) name (zero-terminated), max ca 100 chars.
At properties:
 - (word) number of the following sector
 - (word) reserved for more flags (unused yet)
 - (4 bytes) date (YYYYMMDD, so today is 20 24 05 14)
 - (4 bytes) time (HHMMSS00) (so it is zero-terminated).
 - (4 bytes) file size (little-endian)

At 0x0100:
 - maximal 0x0F00 bytes of data 

The first sector has a lot of space to define more properties. For the sectors that follow, only the flags and the number of the next following sector need to be present. For ease of programming, the data in these following sectors also start at 0x0100.

The flags at address 0 are these ( they are active low ):
 - bit0  if 0, sector is ready to be written
 - bit1  if 0, sector is in use
 - bit2  if 0, sector belongs to a file (but is not first sector)
 - bit3  if 0, this is a directory
 - bit4  if 0, this file was deleted (but still available)
 - bit5  unused
 - bit6  unused
 - bit7  if 0, this file is hidden

FLASH LAYOUT

Where are the files placed in the flash and how do we find them back ?
There are two rules:
  - The first sector of a file will be placed at a position that is based on  the directory that it belongs to, and on a hash function of it's name. If that position is occupied, it will start looking for an empty position in one of the following sectors.
  - The following sectors of a file can be placed anywhere, since they are all linked.

There is only one fixed position, and that is the ROOT directory at sector 1.

DIRECTORIES

The flash is divided in 8 compartments. The files of a certain directory will all be stored in the same compartment. A simple hash function, applied to the sector number of the directory, tells with compartment it belongs to.

FILES

In every compartment there are 1024 sectors. A hash function, calculated from the first and last character of the file name, determines the preferred position of the first sector in the compartment. If the preferred position is already occupied, the first free sector that follows this preferred position will be used. 

So, when the file name is known, it can be found very fast, because only the flags, directory, and name of a file have to be checked in each sector. In most cases it is not needed to check the full filename, because checking the hash is sufficient. In such cases only 5 bytes of the sector need to be read.

When the file name is not known (when asking a directory) only a single compartment has to be searched for valid files. Only the flags and the directory sector have to be checked. This is also very fast, when you type a "ls" command you don't notice any delay.

The bytes for date and time have the highest bit set, except the last byte of the time, that is zero. Now we can use the same sort algorithm for names and time/date.

REALIZATION

The file system was built (in Z80 assembler). It uses microcoded functions for reading/writing on the SPI bus. It works. Functions were made to find a file, and to read or write a sector.
Directories can be created (mkdir) and you can change directory (cd).
There is now also a TRANSFER command, that transfers a file from the Raspberry Pi to the Isetta filesystem (in the current directory). 

Very soon, the loader will, after reset, switch to the BOOT directory, and load a BOOT.BIN and execute it.

For the moment, the binary files will have the Intel-Hex file structure, as discussed in the previous log.

Next step is the loader program. It will be a Z80 program, running on Isetta, that uses the console char I/O, so now it is controlled from the RPi console but in the future it can be controlled from PS/2 and VGA.
This loader program will be in the microcode ROMs, and some microcode will download the loader into the RAM soon after reset, and then start the Z80 loader.

What must the loader do ?
 - download program files from RPi into the Isetta memory, through the 'keyboard interface'
 - start a program
 - inspect memory and change bytes in memory
 - read a file from serial flash (to automatically start software in the future)

Need an assembler !

I found a nice online Z80 assembler:  https://asm80.com
Written by Martin Maly, Prague: https://hackaday.io/adent

It can also assemble for the 6502, that can also be useful in my project.

The assembler generates Intel format binary (.HEX), like this:  (spaces added)
: 10 E000 00 31FEFFC325E04FD3317928FAC9DB3128 2F
: 10 E010 00 FCC97EB7C8CD06E02318F7CD0DE077FE 2A
.....
: 10 E0E0 00 20202020202020202F72756E20617420 97
: 10 E0F0 00 68686868000D4973657474612070726F 98
: 0E E100 00 6772616D206C6F61646572002A00     A9
: 00 0000 01 FF

So the structure is: <:><nr-of-bytes><address><record-type><byte-sequence><checksum>
See: https://en.wikipedia.org/wiki/Intel_HEX

The Javascript microcode generator has now the ability to read this intel hex format, in order to include the loader/monitor in the microcode.
Another change to the Javascript simulator was giving it char I/O according to new KB, TX standard.

Now came File transfer from RPi to Isetta, to load the Isetta memory with a Intel Hex file. In the Isetta loader you have to type a "Load File from Host" command, "F" followed by filename. Isetta then sends %Dfilename%  (D is the command: download). So '%' is used to introduce the file name and start the download. For just sending a plain '%' to be displayed, it must be doubled to "%%".

The data has to travel over the link to Isetta, and that is not very fast. So I did a simple change, replacing every two hex digits by a single byte. In this new format, it uses '=' instead of ':' at the beginning of a line.

RPi will now send the file.  Since the values 00 and FF can not be transported over the link, they are escaped with '['. And because values 00 and FF can occur quite often in machine language, all bytes are first XOR'ed with 0x40, so:
Sending from RPi:
  - xor with 0x40
  - if 00 replace by <[><A>, if FF replace by <[><B>, if [ replace by <[><[>
  (send it)
Receiving at Isetta:
  - if [, get another byte, if A then -> 00, if B then -> FF, if [ then -> [ 
  - xor with 0x40
This transformation does not apply to the '=' at the start of the line. and to the 0x0D at the end.

The record type, 0 for a normal record and 1 for the end, has many unused values, so that can later on indicate if the bytes must be loaded into another memory bank. TBD. 
And the recordtype could be used to store target cpu 6502/z80/... (but it is more practical to define that every program is a Z80 program. A program for 6502 should simply start with an instruction that switches to 6502). Recordtype 0x99 indicates 'file not found'.

During transfer, Isetta transmits readable progress messages on the console: at every 128 transferred bytes it displays the current address. It can also terminate the transfer with a special %X sequence (in case of error).

So, now it is possible to assemble Z80 programs online, send the binary to Isetta, and execute it there !

A major milestone was reached today ! The original Apple 1 BASIC, programmed by WOZ, is running on the real Isetta hardware ! It runs on the intended 12.5 MHz (80nS cycle time).

For character I/O, there is a synchronous serial link with a Raspberry Pi. The screen and the keyboard of the Raspberry Pi are used to communicate with Isetta.

Here you see a screenshot of the RPi screen.  After the ">>" (generated by the RPi) the RPi reads a full input line, echoing it on the screen. Then, after a CR (return), the line of characters is sent to Isetta Apple Basic, and Basic again echoes the characters to the screen. Then the output of the Basic interpreter follows, and the Basic prompt ">". Note that there is an "*** END ERR" because there is no END statement at the end of the program.

PROGRAMMER

Quite some work had to be done after the prototype was soldered. I had to make a Python program on the Raspberry Pi to program the microcode into the three microcode flash chips. On the programmer board  (described in the previous log) a small change was needed. This Python software can also execute arbitrary microcode on Isetta, and run a test program that tests hardware functions.

The programmer can grab the clock of Isetta, by putting the first 74AC163 clock divider into LOAD mode, and providing a new clock (SW generated by RPi) to the first two preset inputs of the 163. The transistor that transferred this clock was, unsurprisingly, not fast while switching OFF, and I suspected that was the reason that I sometimes got a bad working instruction during singlestepping. This transistor also did the 3.3V to 5V translation. I replaced it by a simple diode with a 1N5 cap in parallel. It's a poor man's level converter. At the high RPi 3V3 level, 0.7 V is added by the diode so the ac163 sees around 4V on its input. That worked, errors now occurred rarely, and could be handled by a retry mechanism in the programmer.

How does the application program (the 4K Basic interpreter) get into the main RAM ? I could modify the programmer such that it writes to RAM instead of microcode flash. But I already had a mechanism in place that would also work with a fully stand-alone power-on and reset. A certain part of the microcode copies the BASIC interpreter program from the microcode flash to the main RAM, soon after reset.

COMMUNICATION

Next thing was communication (characters in, characters out) between RPi and Isetta. It should also work when Isetta  generates VGA output, so we are handling a single bit directly after the horizontal interrupt. (That is generated by a simple hardware timer).
The bit handling should always take exactly the same amount of cycles, independent of the data send or received, otherwise there will be jitter in the generated VGA output.

When the VGA output and keyboard are working, we still need this interface to the RPi to transfer files to or from Isetta. We could also use the RPi screen as debugging output while an application runs on the VGA screen.

Since it should also be possible that a PS/2 keyboard is connected to Isetta, the choice was made to use the same receiver hardware and software for the keyboard as well as for data coming from the Raspberry Pi. Since it uses open collector outputs, both clock and data signals can simply be tied together. This combination was not foreseen when the PCB's were designed, so a few wires had to be added.

Communication RX receive driver

The keyboard has two lines, KB_CLK and KB_DATA. Both lines are driven by a open collector output on a standard PS/2 keyboard (pullup resistors in Isetta). If no information is sent, both lines are high. The keyboard receive driver will be able to receive scancodes that are sent by the keyboard. It has the following states:

• Wait for startbit. If the clock line has a falling edge, and the KB_DATA line is low, the startbit is valid and we proceed to the next state. If the data line is high at this falling clock edge, we stay in this state.
• Read databit. There are 8 of these states. If the clock line has a falling edge, the data line will be sampled and its value will be shifted into the keyboard-read register. Bit 7 in this register will be the bit that was sent first. This will be repeated 8 times. After that, we will continue to the parity-bit state.
• Read parity bit. If the clock line has a falling edge, the data will be read but it's value will not be used. But the value of the keyboard-register will be transferred to the keyboard buffer. The keyboard buffer can contain 255 values. There is no check if it is full. (Assumption is that the SW works faster than I can type).
• Read stopbit

The keyboard-receive system will also be used to transfer information from the Rasberry Pi to Isetta. The microcode programmer pcb has two open collector outputs for this purpose, that are (on Isetta) directly connected to the two wires coming from the keyboard. On the RPi this uses GPIO27 and GPIO2.
So, with a simple program on the RPi, the RPi keyboard can be used for Isetta. Instead of scancodes, ASCII codes will be sent over the connection. In the future, this ASCII encoding might be slighty changed, so that it does not overlap with scancodes, and Isetta can see if the info comes from a PS/2 keyboard or from the RPi.

Note that a PS/2 keyboard sends the LSB first, while the above receive system stores the first received bit in 
the MSB (used because it gives simpler microcode). So Isetta receives reversed scancodes.

Communication TX transmit driver

The same keyboard driver will also handle traffic in the other direction (This is NOT the system that is used to send information to a PS/2 keyboard ). This uses a third wire called GP_OUT1, that is an output for Isetta and an input for the RPi. It is called GP_OUT1 because it can be used for other purposes when this TX function is not used.

The output is synchronous, clocked by the KB_CLK signal that is generated by the RPi. It requires that the RPi sends a keyboard byte in order to receive the TX information. The RPi must send a low startbit, and if there is no key to send, the databits should be all ones so Isetta sees a FF character and can dismiss it. Sending FF also provides a good synchronisation on the startbit.

In Isetta, data to transmit must be put into the transmit buffer. It can hold 255 characters. 
The keyboard states have the following functions for TX:

• Wait for startbit. If the clock line has a falling edge, and the KB_DATA line is low, the startbit is valid and we proceed to the next state. If the data line is high at this falling clock edge, we stay in this state. The tx-register is loaded from the transmit buffer, but if the transmit buffer is empty, the tx-register is set to FF. The empty/non_empty state will be remembered in a tx_state register. So, if there is no data to send to the RPi, the RPi will receive a FF byte.
• Read databit. There are 8 of these states. If the clock line has a falling edge, the tx-register will be shifted left, and the bit that is shifted out will be put on the GP_OUT1 line. This will be repeated 8 times. After that, we will continue to the parity-bit state.
• Read parity bit. If the clock line has a falling edge, it will, if tx_state is 0, increment the pointer to the transmit buffer.
• Read stopbit

In each line interrupt, this RX+TX code will take approx. 16 cycles.

Changes to Apple Basic

Apple Basic uses memory locations for its character I/O. In Isetta, the 8080/Z80 IN/OUT instructions
will be used for I/O. These IN/OUT instructions were also added to the instruction set of the 6502 (with exactly the
same opcode as on the 8080/Z80, possible because 6502 has many unused opcodes).

At this moment, port 0x31 is used for RPi/KB input as well as output. But 0x31 is not yet set in stone.

•   IN 0x31 ; Reads KB scancode or input from RPi. Returns byte in ACC. When no byte available, returns ACC=0 with Z_flag=1.
•   OUT 0x31 ; Writes character in ACC to RPi, and when the buffer is full, returns ACC=0 with Z_flag=1.

addr = 0xe3d5;  // address where bytes must be changed in output routine

memory[addr++] = 0xD3; // OUT (opcode 0xD3)
memory[addr++] = 0x31; // port 0x31
memory[addr++] = 0xF0; // BEQ  (try again if buffer was full)
memory[addr++] = 0xFC; // -4
memory[addr++] = 0x60; // RTS


addr = 0xe003;  // address where bytes must be changed in input routine

memory[addr++] = 0xDB; // IN (opcode 0xDB) new keyboard-input instruction
memory[addr++] = 0x31; // port nr
memory[addr++] = 0xF0; // BEQ, loop while buffer is empty
memory[addr++] = 0xFC; // -4
memory[addr++] = 0x09; // ORA #80
memory[addr++] = 0x80; // 
memory[addr++] = 0x60; // RTS,  char in acc.

A lot more to do, a few things:

• Getting VGA output to work
• Make a simple file system in the 32Mb serial flash
• Get PS/2 keyboard working

I bought a PS/2 keyboard online for about 20 Euro, but it keeps sending the same data at fixed intervals. A little online searching learned that my keyboard model only works after it receives a reset command. So that will be a small hardware and software change to add transmitting a reset message to the keyboard.

 Supporting a PS/2 Mouse would also be nice...

I received the PCB's ! These PCB's were sponsored by the kind people of PCBWAY. As always, they are of a very good quality.

And I also received a big bag of parts:

Warm up the soldering iron !