If you look at 1-trit ADC:

You can see source of analog signal at the left bottom corner of scheme. Signal connected to operational amplifier in inverter mode with gain 1. Then it comes to ternary inverter that consists of 2 comparators and 2 diodes (left upper side) with thresholds -U/3 and +U/3. Output of ternary inverter is connected to operational amplifier in inverter mode that are summing signals by this expression:

Uout = -3*(-Uin) - 2*Uinv3 = 3*Uin - 2*Uinv3

where -Uin - inverted input signal, Uinv3 - output of ternary inverter (that ternary inverts inverted input signal).

Output of ternary inverter (point between 2 diodes from which you can see connection to virtual voltmeter) is actual 1 trit output of ADC module.

Output of summing amplifier Uout may be used as error that is normalized to power range -U...+U and that can be used to get next 1 trit using similar ADC module along with next normalized error that can be used farther.

I plan to build 3-trit ADC using 3 such modules and it may be even possible to reduce number of OpAmps used...