UPDATE: the speeds measured here don't represent the true switching speed of these gates. See this log for more details.
I played with the inverter simulation a bit - before testing the speed on the NAND gate, I figured I'd get things straight with the NOT. Adding the base resistors drops the power consumption as expected, but also dropped the oscillation frequency from 2.4 MHz to about 500 kHz. OK, I'll add the speedup caps. Simulations pointed to 1nF as a good value - which seemed large to me, but works OK on the board:
With the 1k base resistors and 1nF speedup caps added, I tested the ring oscillator at a bunch of different voltages. I hooked channel 2 (cyan trace) to the power lead to label the images with the supply voltage.
Again, I saw oscillations down to about 0.4V supply voltage, but things only started to stabilize above 500 mV. Here it is running at about 5kHz.
This logic is probably only truly usable above 700mV (at the temperature I tested at - whatever that was). The circuit runs at 796 kHz, implying a gate propagation delay of 12.5 us, with a rise-time of 70.5ns (fall time not captured).
By 808 mV, the speed has really picked up: f = 3.7 MHz, tpd = 27 ns, trise = 11.5 ns, tfall = 15.5ns. I forgot to measure the current.
Note that those peaks on the top and bottom are above V+ and below ground - I forgot to move channel 2's reference to match channel 1.
The speed has doubled now. f = 7.2 MHz, tpd = 14 ns, trise = 9.5 ns, tfall = 9.5ns, current = 4 mA / gate
A more modest speed increase. f = 9.5 MHz, tpd = 10.5 ns, trise = 10.5 ns, tfall = 10.5 ns, current = 8 mA / gate.
I'm not sure I trust the scope's auto-measurement of rise and fall time with these waveforms. Next time I'm in the lab, I'll turn on the cursors and see exactly what it's measuring - although 1/5 of a division is 10 ns, which looks about right.
A little more speed. f = 10.51 MHz, tpd = 9.5 ns, trise and tfall about 10ns (scope auto-measurement screwed up), current = 12 mA / gate. This is probably the best voltage to run at.
Not much speed increase, just consuming more power. f = 10.58 MHz, tpd = 9.5 ns, trise = 10.5ns, tfall = 10.5ns, current = 18 mA / gate.
Speed reduced slightly, still more power consumption. 24 mA / gate now.
Less speed, more power - 30 mA / gate. The waveforms look superficially nicer, but at the cost of more than 3x the power used at 1.1V and a little less speed.
It looks like these inverters, with 1k base resistors and 1nF speedup caps, work best at around 1.1V supply. At this voltage, they show a propagation delay of about 9.5 ns. A look at the 74HC04 datasheet shows a typical 9ns tpd at 4.5V supply, which drops to 7ns at 5V supply. Amazingly, it would appear that this simple inverter is almost equivalent to 74HC logic in terms of speed. It doesn't seem like it should be...
When I get a chance, I'll wire a 5/6 of a 74HC04 into a similar ring, and see what that looks like.