The code on github can pump and display around 1000 samples/sec, made of 4x8bit adc + 1x8bit for 8 digital IO - that is without any optimisations. Video soon
Lepus Timidus(supposedly endangered 8y ago in Lithuania) will be changing into summer coat too. FPGA version might come form different speed family, like Lynx lynx - but it is of ‘least concern’ according to http://www.iucnredlist.org/ and it does not have to be a cat family, will have to find a new codename[in latin] - hopefully raising some awareness about endangered species along the way..
How do you code name your projects?