The desired hardware configuration is:
- Quad 68030 CPUs with 68882 coprocessors
- 4GB of RAM (LPDDR2?)
- RS232 console interface
- 10/100Mbit ethernet
- Intel 27512 EPROM
- MicroSD storage
The hope is to run Linux / BSD.
The biggest obstacles I see already are:
- My lack of electrical and digital design experience: I am reading a lot (see below) but I will likely need to cut my teeth by building a far more modest 68000 based computer. I'll also need to draw on community experience and support.
- Designing a memory controller: It will be necessary to use modern DRAM chips in order to get the high density needed to supply these 32-bit CPUs with a theoretical maximum 4GB of RAM. This will likely require implementing a specialized memory controller on a FPGA to handle the massive disparities in timing, in addition to driving the DRAM chips.
- Designing a bus arbiter: It appears multiprocessing features in the 68k family of CPUS were first introduced in the 68020. It's not entirely clear to me what kind of logic / circuitry is needed for bus arbitration in a 68030-based SMP. It's even less clear how multiple CPUs are initialized, and how they're initialized and managed by an operating system - there are likely hints in Intel's MultiProcessor Specification documents.
- 68030 SMP support in software: Linux / BSD run on 68030 systems but I doubt they support systems with multiple 68030 processors.