I had the opportunity to participate in two ADAS (Advanced Driving Assistant System) projects using the same FPGA (Xilinx Zynq UltraScale+ MPSoC). To learn about FPGAs and the development environment, I created a Space Invaders game using Verilog in 2018 for the 40th anniversary at that time. I did not use high-level synthesis at this time because if I used FPGA, its environment, and high-level synthesis at the same time for the first time, it would be difficult to determine the cause when things went wrong. For this reason, I used Verilog, with which I was familiar.

In January 2020, Bluespec open-sourced bsc (Bluespec SystemVerilog Compiler). So I installed bsc, a compiler that performs high-level synthesis of designs written in BSV (Bluespec SystemVerilog). BSV, like any other language, cannot be learned by reading manuals, so I thought that the only way to learn a new language was to actually design the application. So, I tried to redesign the Space Invaders game using BSV.


Briefly, Verilog HDL is a hardware design language (HDL) standardized as IEEE 1364, while SystemVerilog is an extension of it standardized as IEEE 1800. BSV is an HDL that further extends SystemVerilog.

Other implementations

At the beginning of the development, I thought that I was the only one who would do such a foolish thing (designing with HDL, which is hard to design). However, after completing the project, I searched YouTube, etc., and found about 10 examples in the world.

However, in some respects, this is unavoidable because it is implemented in HDL, a nonfree language, but most of them are simple, such as the lack of shields (barricades) and the fact that the invaders do not shoot at us. Not only that, but there is no pixel-by-pixel collision detection, which I was impressed with 40 years ago, and which was present in the original. So I tried to make the behavior of the implementation as close to the original as possible. Moreover, we can use backstage tricks such as "Nagoya-uchi" and "Rainbow", which will be discussed later.

Equipment used

On the other hand, the object requires dedicated processing, as shown in the following code. In the previously developed system, I used the Ultra96 FPGA board, which required the Ultra96toPMOD board developed by our company, shown in the first figure. I also have ported the system to the Arty board, which basically requires only the Arty board and each interface board; since the Arty board has four PMOD interfaces, the newly developed Ultra96toPMOD board is not necessary. Besides, the price of Arty board is less than half the price of the Ultra96 board.

First step - Sound FSM (Finite State Machine) design

In applying BSV for the first time, the sound state machine is relatively small in scale, so that was the first design target.

Determining the sound channels

There are 10 different sounds used in the game; the number of simultaneous occurrences (= the number of sound channels) needs to be determined. Considering the conditions for simultaneous occurrences in the game scenario, I assume that there are 4 channels: the sound of the player's own ship, Invader sounds 1 and 2, and the UFO sound.

Sound System Block Diagram

The block diagram of the new specification is shown in the figure below. The sound FSM was expanded to 4 channels from the previous design and a new mixer was installed to enable simultaneous voicing.

I started with the BSV study and completed the sound FSM in about a week.

Second step - Game FSM design

Then I continued with the state machine design of the game FSM.

In designing the sound FSM, I designed the FSM using a state-based design methodology. State-based FSM design method, in this article, refers to a method in which a sequence is manually decomposed into states, and rules are written for each state one by one. This method basically requires the same amount of man-hours as Verilog. In...

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