Close

2016.06.13: CPLD patent filed

A project log for Digitabulum: The last motion-capture glove

Digitabulum is an open motion-capture glove that was intended to be a full-featured, hacker-friendly user-input and sensor platform.

j-ian-lindsayJ. Ian Lindsay 06/14/2016 at 07:021 Comment

I am now waiting on the USPTO to write me back and tell me what I screwed up.

But in all seriousness... it's a tremendous relief to be at this point.
How big a relief?

I started designing r1 about 13 months ago, and received the populated main-boards in October (8 months ago).

Arguably, the CPLD contains the majority of the complexity of this project. Once (if?) I publish its schematics, you won't have to take my word for it. We're talking about BGA100 parts on a 6-layer PCB with buried vias, and accounting for ~70% of the trace-length in the board, the odds of recovery from a mistake made here approach zero.

Even partial-failure of this subsystem would mean a basically useless main board, and (~$2600 + 2 months) blown on a moment's oversight.

For an engineer that touches the physical world, "invoking GCC" might cost more than he makes in six months. So when you meet someone who routinely codes for 10+ hours in C, and their code not only compiles the first time, but does exactly what they meant it to do, this is one possible explanation for how they got that way.

And when you fund a project on your own dime, there are only so many stupid small mistakes you can make before economics kills your project. Any given millimeter of trace might be the thing that vaporizes thousands-of-dollars and the possibility of timely market-entry.

Do Not. Fuck. Up.

So until I could (in)validate the CPLD, nothing more could be decided about the future. And nearly everything else must be built before this particular piece could be tested.

So after about one year of experimenting on a working r0, planning, designing, and finally porting firmware, I proved my hardest hardware lemma to myself. The CPLD works.

This is not to say validation is complete. But it has passed enough tests to convince me that the design goals articulated here will all be met (if they aren't already). Software is going to be *much* cleaner. Hell... the initial working ported code already is cleaner, despite being a sad assemblage of hackery.

Why the patent?

I've never held the US patent system in high-esteem as-implemented. But until we have a blockchain-driven patent system that manages itself and pays inventors based on reference in open-source designs, the idea of purely-defensive patents will have to make-due. Provided my filing goes through, I will begin publishing full CPLD schematics and images alongside the firmware.

Discussions

J. Ian Lindsay wrote 06/14/2016 at 07:13 point

Current Quartus report:

Flow Status Successful - Mon Jun 13 18:51:33 2016
Revision Name DigitabulumCPLD
Device EPM570F100C5
Timing Models Final
Total logic elements 562 / 570 ( 99 % )
Total pins 76 / 76 ( 100 % )
UFM blocks 1 / 1 ( 100 % )

  Are you sure? yes | no